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Ask Me Anything with Mike Jouppi
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28
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565
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April 12, 2024
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Ask Me Anything about High-Current PCBs
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11
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103
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September 26, 2024
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No clean flux vs washing
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10
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599
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September 27, 2024
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PCB GLOSSARY: Parasitic capacitance
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2
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82
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March 17, 2025
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Best Practices for Handling High Currents on PCBs
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15
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243
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November 6, 2024
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Ask Me Anything about ITAR PCBs
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5
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49
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February 14, 2025
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Coplanar vs. Microstrip
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4
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53
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February 20, 2025
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Ask Me Anything about PCB Design for Assembly
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10
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69
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November 11, 2024
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Power Supply Board PCB Stackup
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17
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138
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September 11, 2024
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Impact of Dielectric Thickness on PCB Capacitance
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5
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86
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December 31, 2024
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Via Fencing Clearance for CPW Structure
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2
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135
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December 18, 2024
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2-Layer vs. 4-Layer Boards for DDR3
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4
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89
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December 19, 2024
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Choosing the Right Decoupling Capacitor for Lower Frequency Transients
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8
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229
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August 26, 2024
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Effective 4-Layer PCB Stack-Up Strategies for high density boards
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9
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220
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August 9, 2024
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Potential cost savings from eliminating vias
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6
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248
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November 18, 2024
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Live Q&A: HDI PCB Design and Fabrication
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8
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163
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October 23, 2024
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LIVE Q&A: Stack-Up Design
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21
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693
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July 16, 2024
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Ask Me Anything about Thermal Management
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10
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232
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June 19, 2024
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Live Q&A: Material Selection
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10
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210
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August 20, 2024
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Ask Me Anything with Karen Burnham
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17
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509
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May 22, 2024
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Optimal Placement of Stitching Vias
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14
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682
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July 25, 2024
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Managing Ground Planes in Compact 4-Layer PCB Designs
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4
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68
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December 3, 2024
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Win a FREE seat for Susy Webb's routing and signal return path seminar!
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7
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66
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September 18, 2024
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Understanding Prepreg and Core
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17
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395
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September 9, 2024
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Stack-Up Configurations for 2-layer and 4-layer PCBs
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7
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121
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August 5, 2024
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Ask Me Anything about Blind and Buried Vias
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10
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60
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September 5, 2024
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Ask Me Anything about IPC Class 3
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20
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133
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July 31, 2024
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Adding copper pours on top/bottom signal layers
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4
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75
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October 14, 2024
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Win a seat for Karen Burnham's seminar on antennas and EMI!
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11
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256
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July 9, 2024
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Inquiry About Soldering Wire to SMT Pad Without PTH
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3
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48
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January 10, 2025
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