Join our Ask Me Anything with Ignacio de Mendizábal where you can ask us questions on:
• Effective EMC design strategies
• Troubleshooting and debugging techniques
• Overcoming challenges in high-speed and RF designs
• And much more!
Question submission window: Through November 27th
Hello Ignacio. Do you have specific strategies that you can recommend for managing ground planes to reduce EMC issues?
What methods should be used to tie DC power supply ground to chassis ground to prevent 3-phase AC Line to chassis ground surge testing from causing items powered by the DC supply to fault during a surge event? A fault could be caused by the surge causing a ground bounce which causes invalid data or signal noise.
Do you have any rules of thumb for trace routing to minimize EMI?
Can I add my question, too? What’s one piece of advice you wish every engineer knew about EMC design?
For differential signals, like RS-422, 485, CAN bus, or BiSS-C, shall we terminated both TX and RX sides for less EM emission?
In addition to keep the impedance of the differential paired wire under controlled, shall it also need to be shielded?
I have a “fun” question. What are the most common surprises engineers encounter during EMC testing? How can you prepare to avoid those?
Any chance AI can handle EMC for me yet? 
Thanks for posting your questions, everyone! Ignacio is out sick this week so he’ll reply when he’s back in the office. Wishing him a speedy recovery!