Welcome to SierraConnect! :wave:
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61
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686
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January 2, 2024
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Routing I2C Lines Through Vias
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4
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142
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October 15, 2024
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Closely spaced hi voltage traces and connector
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1
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12
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October 15, 2024
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Adding copper pours on top/bottom signal layers
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4
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37
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October 14, 2024
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Smart Prepreg Selections
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2
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28
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October 11, 2024
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Thick copper layers
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12
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116
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October 5, 2024
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Ask Me Anything about High-Current PCBs
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11
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87
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September 26, 2024
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Ask Me Anything about KiCad 8
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13
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52
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September 13, 2024
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Power Supply Board PCB Stackup
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17
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96
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September 11, 2024
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Via placement instead of plated mounting hole
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2
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20
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October 4, 2024
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Ask Me Anything about PCB Via Design
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28
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104
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September 26, 2024
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Win a FREE seat for Susy Webb's routing and signal return path seminar!
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7
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51
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September 18, 2024
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Ask Me Anything with Mark Hughes
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43
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658
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April 11, 2024
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Ask Me Anything about Blind and Buried Vias
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10
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43
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September 5, 2024
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PCB Copper thickness Price chart
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6
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87
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September 2, 2024
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Effective 4-Layer PCB Stack-Up Strategies for high density boards
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9
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179
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August 9, 2024
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Copper thickness and power loss
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2
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38
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September 17, 2024
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Live Q&A: Material Selection
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10
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196
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August 20, 2024
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Ask Me Anything with Mike Jouppi
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28
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546
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April 12, 2024
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Ask Me Anything about IPC Class 3
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20
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117
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July 31, 2024
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No clean flux vs washing
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10
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107
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September 27, 2024
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Thermal effects of component placement on different PCB layers
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4
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74
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August 26, 2024
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Stack-Up Configurations for 2-layer and 4-layer PCBs
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7
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101
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August 5, 2024
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LIVE Q&A: Stack-Up Design
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21
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668
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July 16, 2024
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Ask Me Anything about Thermal Management
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10
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219
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June 19, 2024
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Ask Me Anything with Karen Burnham
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17
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502
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May 22, 2024
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Win a seat for Karen Burnham's seminar on antennas and EMI!
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11
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252
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July 9, 2024
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Is it acceptable for PCB traces to cross on different layers?
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9
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104
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August 22, 2024
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Ask Me Anything about High-Voltage PCBs
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8
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101
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August 7, 2024
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Signal Return Paths in a multilayer PCB Stack-Up
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8
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274
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July 18, 2024
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