|
Welcome to SierraConnect! :wave:
|
|
61
|
780
|
January 2, 2024
|
|
How critical Is control impedance tolerance in short RF traces?
|
|
2
|
7
|
June 24, 2025
|
|
Reference plane requirements for controlled impedance routing
|
|
4
|
26
|
June 21, 2025
|
|
Temperature issue of EV Inverter at peak operating point
|
|
29
|
107
|
June 24, 2025
|
|
Ask Me Anything about SMT Assembly
|
|
9
|
114
|
June 18, 2025
|
|
Trace width guidelines for single-sided PCBs
|
|
7
|
75
|
June 18, 2025
|
|
Is My HDI Via Strategy Correct for .5mm FBGA?
|
|
9
|
61
|
May 30, 2025
|
|
Is It Standard to Route Power Traces Before Pouring Planes?
|
|
1
|
43
|
June 17, 2025
|
|
Webinar: How DFM and DFA Can Save Your RF Prototypes
|
|
3
|
226
|
June 20, 2025
|
|
Set the right aspect ratio and capture pad
|
|
0
|
27
|
June 17, 2025
|
|
Backdrilling vs. Blind Vias
|
|
6
|
118
|
May 30, 2025
|
|
Understanding Staggered Via Transitions in Multilayer HDI Designs
|
|
3
|
33
|
June 2, 2025
|
|
Designing a Power Plane on an Internal Layer with 0.5 oz Copper
|
|
4
|
40
|
June 4, 2025
|
|
Clarifying My Understanding of DDR3 Signal Routing
|
|
8
|
142
|
May 8, 2025
|
|
Clarifying my understanding of the 8-layer PCB stack up focusing on DDR3, PMIC sequencing, and ground/power plane design
|
|
4
|
80
|
May 22, 2025
|
|
CPWG Height Calculation and Ground Clearance for Trace Antennas
|
|
3
|
24
|
June 2, 2025
|
|
How do you approach EMI?
|
|
8
|
91
|
June 16, 2025
|
|
How to Length Match RGMII Data Lines — Meanders Not Forming on Shortest Trace in KiCad
|
|
6
|
66
|
April 29, 2025
|
|
What is material to be use for PCIe Gen 6.0/7.0?
|
|
5
|
47
|
May 28, 2025
|
|
Ask Me Anything about In-Circuit Testing & Flying Probe Testing
|
|
8
|
72
|
May 14, 2025
|
|
PCB heat dissipation through air and heatsink
|
|
7
|
93
|
May 12, 2025
|
|
Difficulty Setting Trace Isolation Due to Close Pad Proximity in KiCad?
|
|
8
|
115
|
May 12, 2025
|
|
How to Design a PCB Trace Antenna with Limited Datasheet Info?
|
|
1
|
25
|
May 29, 2025
|
|
DDR3 Address/Command/Clock Length Matching Clarification – Is My Understanding Correct?
|
|
3
|
45
|
May 13, 2025
|
|
Transition to Halogen-free PCB materials
|
|
5
|
47
|
May 19, 2025
|
|
How to implement 1.5–2.0ns delay in RGMII TXC trace for RTL8211F?
|
|
6
|
91
|
April 28, 2025
|
|
PCB Material Comparison
|
|
5
|
171
|
May 21, 2025
|
|
Dk Variation with temperature in PCB Materials
|
|
6
|
64
|
June 11, 2025
|
|
How Do You Estimate Power When Datasheets Lack Current Specs?
|
|
5
|
48
|
May 30, 2025
|
|
HDI Breakout for 0.4mm pitch BGA
|
|
12
|
164
|
April 15, 2025
|