I don’t work on the assembly side but I think I can take this one.
Flying probe testing needs more than just the physical layout. It’s not enough to know where copper is. We also need to know what it connects to. ODB++ (or IPC-2581 or native CAD files) includes rich data like netlists, component values, pin mappings, and layer stack-up info. These are essential for us to generate the flying probe test program. Gerbers only describe your board’s geometry, not the connectivity or component intelligence, so they can’t support full test coverage.
Flying probe testers can handle very small targets compared to ICT. The minimum test point size is 6 mils, though 20 mils is recommended for best reliability. The minimum spacing between test points should be 10–20 mils. Smaller targets are possible due to the precision of the probes and lack of bulky fixture constraints.
Not necessarily. One of the big advantages of flying probe testing is that it doesn’t require dedicated test points. It can probe directly on component pins, vias, through holes and exposed pads. We recommend FPT for prototypes or dense designs where your real estate is limited. That said, you’ll get better test access and coverage if you follow good FPT design guidelines like exposing vias and ensuring probe clearance around components.
Flying probe testers can test under BGAs, QFNs and other leadless devices using capacitive probing. It’s true that the probes can’t make direct electrical contact with hidden pads but capacitive coupling allows the tester to sense activity at those nodes indirectly. It’s not as thorough as boundary scan or X-ray inspection but it’s surprisingly effective for many use cases.