I am designing a coplanar waveguide (CPW) structure for the active antenna. Previously, I constructed a CPW for a passive antenna using FR4 material for the PCB, with a dielectric constant of 3.48. The thickness of the material was 0.5 mm, which I used as the distance between layers. I selected the second layer as the reference ground plane. Using an online calculator, I obtained a 1 mm RF signal width and a 0.2 mm clearance from the ground. However, I am unable to apply the same approach for this circuit due to differences in the design
the coplanar waveguide (CPW) structure I attempted doesn’t seem to be designed correctly
I am seeking advice on the optimal component placement for this circuit to ensure the best performance, particularly for components such as the ferrite bead, capacitor, and resistor in the RF signal path. Additionally, I would appreciate guidance on how to properly route traces. I am a beginner in circuit designing and PCB design, so any help or suggestions would be greatly appreciated
schematic image .
The stack-up consists of the following layers: the 1st layer is Signal, the 2nd layer is Ground, the 3rd layer is Ground, and the 4th layer is Signal
I’m very curious about the VCC_RF power rail current carrying capacity.
The designer has created a CPWG structure for GPSANT signal on the top layer (from connector to antenna) but, the same signal is stitched from another layer before the connector that doesn’t have CPWG (near L4)!!!???
Also, if CPWG then for that trace width, there shouldn’t be an immediate GND beneath the GPSANT signal. Even the impedance calculation tool may that difference (Maybe in the image it looks like there’s a GND in the immediate layer)
Is that L4, R44 & C20 part of matching circuit? If yes, then it is better to group them and place them on the path. Don’t create unnecessary stubs for RF.
Have enough via stitch on CPWG GND to the internal GND layer. Very helpful in reducing noise interference.
Better to have the antenna and its associate signal on the same layer. Unless you know how to switch them between layers without dropping their performance (insertion and return loss)
Also, I wanted to know how the overall design looks.
The schematic looks like a RF BIAS TEE. I don´t see any mention to the signal frequency but typically a BIAS TEE uses a coil instead of a ferrite (sometimes more than one).
Thank you for your response.I designed a coplanar waveguide (CPWG) structure for an RF design using the Broadcom AppCAD tool. The stack-up uses FR4 material, with the 1st layer as Signal, the 2nd and 3rd layers as Ground, and the 4th layer as Signal. The dielectric thickness between the first and second layers is 0.144 mm.
I’m confused about arranging components when there is a parallel ground signal. The signal width is 0.25 mm, and the clearance between the signal and ground is 0.2 mm. As a beginner, I understand the importance of having a parallel ground signal to the RF signal. However, without creating a stub, I find it challenging to arrange this.
Yes, with the surrounding GND pour, you can create CPWG. But, you should calculate it using the impedance calculator (Impedance Calculator | Sierra Circuits).
Don’t forget to stitch GND vias throughout the CPWG trace. you should have sufficient GND stitch.
I think you shouldn´t do that. If there is no plane on the Top layer the impedance is not constant over the line. Keep in mind that the VIAS are so close that the impedance is affected. Put the VIAS at least 3 times the track width to eliminate any influence or keep the ground plane as it is right now. The minimum distance between VIAS depends on the maximum relevant frequency in use.