I’m planning to add vias to round test point pads on the top layer. I know via-in-pad usually costs extra due to filling requirements, but since these are just test points (not soldered pads), will a via here still incur that extra cost, or is it treated like a regular via in a copper trace? Thanks.
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The whole reason to fill and cap plate holes within a pad is to create a flat surface and prevent solder from exiting the pad surface, into the hole, and possibly the opposite board side. TP pads do not need to have solder applied so the primary concern does not exist unless you are allowing solder to be applied to TP pads.
I generally do not allow solder to be applied to TP pads however if you use certain surface finishes, having solder on those pads might be desirable. Keep in mind that probing pads covered with solder can have an impact on the probe lifespan.
The primary risk is if the TP probe pushes into the hole and becomes lodged or bent. This depends on the final hole size in comparison to the TP probe head size. Ideally the probe head and hole size should be chosen so it becomes impossible for that to happen.
No, there should be no fabrication cost associated with vias in TP pads unless you choose to fill and cap plate them.
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I agree with Timothy. It shouldn’t incur any extra cost for unfilled vias in test point pads. The surcharge only kicks in if you need filling and plating for solderability, which isn’t necessary here.
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Like timothy mentions, the only real concern is probe stability. A pogo tip can dive into a large via, so keep the drill size small or offset the via slightly so the probe consistently lands on copper. This prevents false readings without adding any extra fabrication steps.
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