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Trace width guidelines for single-sided PCBs
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7
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95
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June 18, 2025
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Set the right aspect ratio and capture pad
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0
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41
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June 17, 2025
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Dk Variation with temperature in PCB Materials
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6
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78
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June 11, 2025
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CPWG Height Calculation and Ground Clearance for Trace Antennas
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3
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53
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June 2, 2025
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Understanding Staggered Via Transitions in Multilayer HDI Designs
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3
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44
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June 2, 2025
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Backdrilling vs. Blind Vias
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6
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214
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May 30, 2025
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Is My HDI Via Strategy Correct for .5mm FBGA?
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9
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70
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May 30, 2025
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How to Design a PCB Trace Antenna with Limited Datasheet Info?
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1
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36
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May 29, 2025
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Power Plane Limitations and Routing Alternatives in Multilayer PCBs
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2
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48
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May 29, 2025
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Clarifying my understanding of the 8-layer PCB stack up focusing on DDR3, PMIC sequencing, and ground/power plane design
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4
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136
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May 22, 2025
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PCB Material Comparison
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5
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229
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May 21, 2025
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Transition to Halogen-free PCB materials
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5
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63
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May 19, 2025
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DDR3 Address/Command/Clock Length Matching Clarification – Is My Understanding Correct?
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3
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78
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May 13, 2025
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Use of Teardrops in PCB Design
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11
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201
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May 12, 2025
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PCB heat dissipation through air and heatsink
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7
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94
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May 12, 2025
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Difficulty Setting Trace Isolation Due to Close Pad Proximity in KiCad?
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8
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121
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May 12, 2025
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WEBINAR HIGHLIGHT: Maintain Optimum Trace Width and Spacing
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0
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15
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May 12, 2025
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OPEN DISCUSSION: Which PCB design software do you use and why?
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5
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81
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May 12, 2025
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Routing of high-speed signals (DDR, USB) on outer layer
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2
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60
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May 7, 2025
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2-Layer vs. 4-Layer Boards for DDR3
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8
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150
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May 2, 2025
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Learning the DFM process…
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0
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16
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May 1, 2025
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How to Length Match RGMII Data Lines — Meanders Not Forming on Shortest Trace in KiCad
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6
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102
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April 29, 2025
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Fiducial on non-rectangular board
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2
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46
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April 28, 2025
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How to implement 1.5–2.0ns delay in RGMII TXC trace for RTL8211F?
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6
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140
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April 28, 2025
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Changed Default Clearance to 0.07 mm for FBGA – Do I Need to Adjust Non-BGA Signals?
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3
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53
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April 18, 2025
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Optimal PCB Stack-Up Strategy for Routing LVDS Signals in Multilayer Designs
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8
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133
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April 16, 2025
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POLL: What’s your typical PCB stack-up configuration?
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0
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31
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April 15, 2025
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HDI Breakout for 0.4mm pitch BGA
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12
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183
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April 15, 2025
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How Should I Protect a 12V DC Input in Schematic Capture?
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3
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254
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April 14, 2025
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Test Points Placement vs Signal Integrity
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12
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245
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April 8, 2025
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