Webinar: Resolving High-Speed PCB Design Challenges

Thank you for your interest in our webinar on resolving high-speed PCB design challenges. It will be presented by the Sierra Circuits team of design engineers.

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You can ask your questions on this thread.

Here’s the Q&A:

Question Answer
A lot of acronyms that you seem VERY fluent in. Where can we look up the definitions of some of your acronyms? Yes, absolutely! Each input in the tool comes with helpful guidance. You can find detailed explanations in the Help section by clicking the ‘(?)’ button next to each field.
9D4 via what is the plating thickness of that via, and how to calculate the current capability of that via? Is temperature rise considered for that? Microvias can be plated with thicknesses ranging from 0.35 mils up to fully filled vias, depending on design requirements. To calculate the current-carrying capacity of a via, including the effect of temperature rise, you can use the ‘Via Temperature Rise and Current Capacity’ tool available on our website.
https://www.protoexpress.com/tools/via-current-capacity-temperature-rise-calculator/
9D4 is having 2.5mils plating (9-4)/2=2.5 is it correct?? 2.5 mils refers to the annular ring of the laser-drilled microvia, not the plating thickness. The annular ring is the difference between the pad and via sizes, divided by two.
Whatever stack-up you showed, how are you maintaining the stack-up symmetry since the PWR layers are on the Bottom sides? The stack-up uses mixed layers to maintain symmetry. This means that although the power (PWR) layers are positioned toward the bottom, the overall structure is balanced by carefully arranging signal and ground layers along with controlled dielectric thicknesses to ensure mechanical and electrical symmetry.
Is the type of dielectric material recommended for this design you showed? Yes, we recommend using dielectric materials like N7000-2 HT or Isola I-Speed for the design shown.
Also, what type of visa filing is recommended for this high-speed design? For this high-speed design, non-conductive via filling is recommended to maintain signal integrity and reliability.