I have some questions regarding routing a signal trace (L1: top layer) over a split reference plane (L2: second layer).
I found a document “General High Speed Signal Routing” a TI document SPRAAR7J – NOVEMBER 2018 – REVISED FEBRUARY 2023. I tried to upload but it does not work. Anyways, here is the link to the document. Otherwise this can be downloaded from the internet easily.
Here is the link.
Section 2.4 of the document describes High Speed Signal Reference Planes. ideally there should be no void and no slit in the reference planes. The pictures are shown in Figure 2-6 and Figure 2-7 respectively. These pictures are attached.
The document also says “If routing over a plane-split is completely unavoidable, place stitching capacitors across the split to provide a return path for the high-frequency current. These stitching capacitors minimize the current loop area and any impedance discontinuity created by crossing the split. These capacitors should be 1 μF or lower and placed as close as possible to the plane crossing. For examples of incorrect plane-split routing and correct stitch capacitor placement, see Figure 2-8 and Figure 2-9.”
Figure 2-8. Incorrect Plane-Split Signal Routing
Figure 2-9. Stitching Capacitor Placement
The pictures are attached.
My questions is on “stitching capacitor placement” shown in Figure 2-9.
Consider two case:
[L1: Signal L2: Ground (GND)]: A signal trace routed on L1, the top layer and these exist a split in Ground plane “GND” in L2. How do we mount stitching capacitor ? Given there exist a split in the ground reference plane (GND) on L2. Probably we mount a stitching capacitor on L1, the top layer with both terminals connected to ground reference plane (GND) through via ? Is that correct ?
[L1: Signal L2: AGND and DGND]: Instead of a split, there are physically two reference planes on layer L2. The signal trace on L1, the top layer has to be outed over AGND and AGND located on L2. How do we mount stitching capacitor in this case ? A part of the signal on L1 is routed over AGND and the other part of the signal on L1 is routed over DGND. Both AGND and DGND are located on L2. Do we need to mount stitching capacitor ?