Hi everyone,
We are designing two different boards:
- Board 1: LPDDR4
- Board 2: LPDDR5
For both boards, we need to perform signal probing during hardware validation and debugging.
I would like to know the recommended approach for probing LPDDR interfaces without significantly affecting signal integrity.
Specifically:
1. What probing methods are recommended for LPDDR4 and LPDDR5 (probe pads, probe vias, high-speed test points, etc.)?
2. Are there any PCB layout or routing guidelines that should be followed to support future probing?
3. What design considerations should be taken into account to minimize impedance discontinuities and reflections introduced by probing?
4. Are there any reference designs, application notes, or best practices from SoC or memory vendors that discuss LPDDR probing?
Any guidance or practical experience would be greatly appreciated.
Thank you.
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Not recommended. Test fixtures will be super expensive to build and any test access creates stubs. Assuming you even have room to create access, expect to use the 1 mm pitch probes which are most fragile and most prone to false reports.
If you can live with stub reflections, maybe use only to do shorts/opens flying probe testing? I would not attempt to fixure for live signal measurements. Keep in mind that equipmnet probes will likely swamp out low level signals so will you even be able to see what you want if you do have access?
For DDRx nets, I generally do not add test access. Use a functional test at PCBA assembled stage to verify operation.
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I suspect that if you review your hardware design guide that details how to route the DDRx nets, you will find that there is very little wiggle room in routing length in order to maintain proper signal integrity. This will make it very difficult to add signal length out to test pads. The best bet is if you can probe existing vias which will tend to very small and on very tight pitch…hence why I referenced 1mm pitch probes if you dare to try.
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