Best Stack-up selection for a High-Density Board Design

I’m exploring options for designing a high-density board measuring 6 x12 cm, that will incorporate an MCU, external RAM, GPS, GSM, Bluetooth, CAN, and RGB interface. I’ve been contemplating which stackup would be most suitable for this project.

In my previous design, I used a 4-layer board (SIG/GND/PWR/SIG) measuring 9 x 16 cm, and everything functioned well. However, I’m not entirely satisfied with how I’ve routed the power plane, especially considering the upcoming need to meet CE/FCC requirements for the next hardware version.

I’m considering two stackup options:

4-Layer Stackup:

  1. Signal/Power
  2. Local ground/Signal
  3. Full ground plane
  4. Signal/Local ground/Power

6-Layer Stackup:

  1. Signal/Local ground/Power
  2. GND
  3. Signal
  4. Signal
  5. GND
  6. Signal/Local ground/Power

I only have two voltage levels (5V/4V/3V3), and I don’t believe I need a dedicated power plane.

With the 6-layer stackup, I’m concerned that most traces would be horizontal, limiting my ability to utilize vertical/horizontal routing techniques with the GND layer in the middle.

As I lack experience with custom stackups, I’m unsure about the required spacing between layers for both solutions. Do you recommend using either of these stackups? Alternatively, would it be better to implement a full power plane for 3V3 and use 5V/4V as local power nets, considering there’s only one IC per voltage level?

A local power plane allows you to isolate power routing from your signal layers, enabling better focus on signal coupling, routing, and impedance control.
However, the best advice depends on the specifics of your design. Here are some of the preferences and the reasoning behind them:

  1. Ground Proximity for Signal Layers: It is preferred to keep no other layers between the ground and important signals. In complex designs, try to place as many signal layers as possible directly next to a ground layer, fitting within my stack budget. If budget allows only one reliable signal layer next to a ground, ensure that layer is dedicated to the most important or highest frequency signals.
  2. Consult Your Fabricator: For stack-up distances and specific details, it’s best to consult with your PCB manufacturer. They can provide the exact specifications they can achieve, which you can then use for impedance control if needed. Additionally, they can inform you about the accuracy of their PrePreg process. If the process isn’t very uniform or if the layer has a lot of copper areas mixed with gaps, you might want to place signal and ground layers on either side of a standard core layer for better impedance control. In such cases, you might prefer your initial stack-up choice but swap the “SIG” and “Sig/Pwr/Gnd” layers.
  3. Analog vs. Digital Power Domains: If you have high-fidelity analog signal requirements, it’s beneficial to completely separate your analog and digital power domains, including the ground planes, and connect them only at the power input of your board. This effort reduces digital noise in your analog signals, which is crucial for accurate measurements.

These considerations should help optimize your PCB design, balancing performance and manufacturability.

1 Like

First, if you weren’t happy with the 4 layer version then you should absolutely go to six layers. Since you have such a great “signal salad” with RAM at maybe 1600 MHz, GPS at 1575 MHz, GSM at 900 to 1800, Bluetooth at 2.4 GHz, RGB and CAN bus in the low megahertz range then you are truly taking advantage of the spectrum. The Bluetooth is perhaps the fast signal, and overall we need maybe an 8 GHz channel. I think I’d shoot for six layers like this:

  1. Signal
  2. Ground
  3. Power
  4. Power/Signal
  5. Ground
  6. Signal

and I’d put the highest frequency and the most sensitive/important signals on layer one, which can then have a tightly coupled ground plane close by. The rest of the fast/vital signals would go on the bottom, again with a tightly coupled Ground plane next door. That leaves the layer 3 power layer which you indicate is kind of a mish-mash of a few voltages, some only used in a few places. Layer 4 would then be your overflow layer for completing power nets, and for routing the mundane signals related to the top and bottom (various control lines, reference inputs, buffers, etc. The Horizontal/Vertical game is not very important with this stackup. Were you concerned with isolation and /or crosstalk? If you can pull out the majority of the controlled impedance and get it routed cleanly on the top layer I’m sure you’ll be fine. Look for 4 to 6 mils spacing between 1 and 2, and 3 and 4. Choose a nice core size and you’re pretty much there.

1 Like

Considering the amount of circuits and signals, you may want to consider 8 or 10 layer stackups. Do not ignore return paths and routing over split planes as can happen with split power layers on one of the adjacent layers.