Stack-Up Configurations for 2-layer and 4-layer PCBs

Design and Layout
1

I am interested in learning about the stack-up configurations that others employ when designing 2-layer and 4-layer PCBs.

For 2-layer PCBs, I typically utilize the top layer for signal and power traces, with a ground pour around the signal lines to reduce impedance. The bottom layer is dedicated entirely to ground.

Although I have limited experience with 4-layer PCBs, my approach usually involves designating two layers as ground. For example, I might use a stack-up such as SIG/PWR—GND (core) SIG/PWR—GND or GND—SIG/PWR (core) SIG/PWR—GND. This configuration aims to provide a close reference for signal and power tracks by incorporating dual ground layers.

Which stack-ups configuration has proven to be the most reliable for 2-layer and 4-layer PCBs?

1 Like
2

For 2 layers the stack up you use I think is the best option.
For 4 layers there are more options. In case you have to use VIA´s for “high data rate signal” then the optimal is like this: Signal/PWR-GND-GND-Signal. If there is no “high data rate” signal involved then this other stack up can be also useful: GND-Signal/PWR-(core)Signal/Power-GND. The last stack up is shielded and the core separates the two signal layers so most probably there will not be any kind of crosstalk.

2 Likes
3

You can use Sierra Circuits’ PCB Stackup designer tool to quickly create 2-layer- and 4-layer stack-ups. This tool provides various stack-up options. You can pick the one that best suits your requirements.

1 Like
4

For a balanced PCB design, it’s generally advisable to dedicate about half of the layers to planes. This can be adjusted for higher layer counts where crosstalk is less of an issue (e.g., most digital communications, but not precision RF).

In a 4-layer PCB, the outer layers are typically used for component placement (assuming a mostly-SMT design), leaving the inner layers for ground (GND) and power (VCC). Therefore, a typical stack-up would involve using the two inner layers for GND and VCC, divided as needed.

For a 2-layer PCB, you can only afford one dedicated plane layer. However, this setup has limitations because you may need to route traces on both sides to resolve crossings, creating slots in the ground pour and reducing coverage.

To mitigate this, you can use a technique where both top and bottom layers have ground pours, connected with stitching vias around any crossings or slots. This minimizes the loop area for ground paths, improving signal integrity.

In cases where two traces cross, it’s crucial to add vias at the corners of the intersection to keep the loop size minimal. This helps maintain a solid ground reference even with routing on both layers.

Routing both VCC and GND on the same layer can create numerous voids, complicating connections and increasing impedance. Instead, route VCC point-to-point with local bypass capacitors at every power pin or group of pins. This method approximates a lumped-equivalent transmission line network, easily terminated with resistance at one or both ends. Use an R+C termination with an electrolytic or tantalum capacitor and a series resistor for added stability.

Therefore, it is recommended to route a 2-layer board with ground pours on both sides, varying layer affinity by area. Preferably, most components and routing should be on the top layer, but bottom routing or placement is acceptable if stitched as well as the top. VCC should be routed point-to-point with point-of-use bypass capacitors and other PDN considerations. This approach approximates a lumped-equivalent transmission line network, easily terminated with some resistance at one or both ends using an R+C network (e.g., an electrolytic or tantalum capacitor with nominal ESR or a ceramic capacitor with added ESR in series).

1 Like
5

We constantly get asked “What is the best…” but in fact there’s usually no one answer. It’s going to depend on so many factors. Cooling? Air flow? Number of layers? Layer material? Surrounding structures? Materials used? Environmental conditions expected? Highest signal frequency? Minimum and maximum voltages?Assuming the surface you place components on is the top, you would want a nice, heavy ground plane close by. If it’s a two layer board, you’re done. If it’s intended for four layers then adding two more heavy ground planes is good. Usually you won’t have that luxury. So I think it’s important to look at each board as a new project, a new challenge if you will.

1 Like
6

2-layer PCBs are always difficult if you have anything high-speed or RF on them (and this includes things like switching voltage regulators). What you said is correct, the bottom layer is dedicated to GND is the first and most important aspect. But there are other things you can do that can give you a free performance boost, and the main one is make the board thinner. This is limited by the mechanical strength you need in the PCB itself, but if you can reduce the thickness from the “standard” 1.6mm down to 0.5mm you will significantly increase the coupling between signals and GND plane which means the fringe fields are weaker and so do not radiate so much. If you know what PCMCIA cards are (were), 0.5mm was their standard thickness.

For 4-layer boards there are quite a few more options. The two commonest ones are Sig-GND-PWR-Sig and Sig/PWR-GND-GND-Sig/PWR. Of these Sig-GND-PWR-Sig wins if your board has to carry high currents (say >10A) AND is only low frequency signals. For everything else Sig/PWR-GND-GND-Sig/PWR is the hands-down winner. This is the case because the signal integrity & EMC concerns are so much better with this stack-up.

The reason for this comes down to the return planes for the signals. As stated in one of the other replies, when the signal passes from one layer to another, the displacement current (adjacent to the signal in whichever plane) also needs to change layer, so putting in a GND stitching via or two solves this easily. This is easy when both planes are GND, but is not really possible when the planes are GND and PWR. If you have a PWR plane you need a capacitor to create an AC path to the GND plane, but this is a problem. Standard 0402 capacitors of say 100nF look inductive above about 30-50 MHz. With these frequencies, signals with edge rates faster than 10ns or so are not going to be well handled and will radiate.

If we ignore the special case (where a 4 layer board has a plane set aside for power) and just consider the Sig/PWR-GND-GND-Sig/PWR case, there is one other thing that you must do to get the benefit. That extra thing is to make the plane to signal/power layer separation small (<0.1mm is good, below 0.075mm is better). This maximises coupling by increasing both the mutual inductance and capacitance. Of course, if you have controlled impedance traces like 85/90 Ohms for USB2/3 etc. the signal to plane separation has to be small for the impedances to be possible with sensible track/gap widths. The result is that the core with the two GND planes is normally quite thick (1.2-1.4mm).

When you go with other solutions like GND/Sig-PWR-Sig-GND it is important to note that for this to work well, the GND/Sig layer is really a GND layer, and the Sig aspect of it is just to get between component pads and the inner layers. The better way to think of it is GND-PWR-Sig-GND. In real life the signals will cross over each other, this has to be restricted to the PWR plane so the integrity of the GND plane is not compromised. When you make the transitions, don’t forget the GND coupling vias for the displacement currents. Since you can see that the signals are going to be present in the PWR plane, the real structure is effectively GND-PWR/Sig-Sig-GND, but in practice the power probably needs to cross-over as well, so you end up with GND-Sig/PWR-Sig/PWR-GND. This is an inside-out version of the standard 4-layer method.

While it is true that you get a modest approximation to a Faraday cage with this stack-up, there is one gotcha that it is very easy to fall foul of. That is forgetting that the GND plane where the components are placed must have lots of cut-outs in it where the component pads are. If the components are mostly SMD, they do not automatically creates restrictions in the adjacent routing layer like a through hole component would. The problem here is that when you route a trace across one of the gaps in the GND plane, it is going to radiate from the plane. This method can work very nicely, but only if it is done properly.

2 Likes
7

Thank you all for your valuable insights and suggestions on PCB stack-up configurations. Your advice has provided me with a deeper understanding of best practices and considerations for both 2-layer and 4-layer designs. I appreciate your time and expertise in helping me improve my approach. Thanks again!

1 Like
8

I completely agree with your approach of using a 4-layer PCB for several important reasons. Ensuring both power and signal traces are routed close to a ground plane is crucial for maintaining signal integrity and minimizing electromagnetic interference (EMC). This configuration essentially requires two layers to serve as ground planes, while the other two layers accommodate both power and signal traces.

In my experience, routing power has never been a significant issue. I focus on regulating and decoupling power at the point of consumption, which makes the impedance of power traces almost irrelevant. I generally prefer having an additional ground plane over a dedicated power plane.

Potential Exceptions: However, I haven’t yet designed boards for large ASICs or FPGAs, which sometimes require very low power supply impedance (below 100 mΩ) across a broad frequency range up to 100 MHz and beyond. Achieving such low impedance typically necessitates tightly coupled power-ground plane pairs for connecting supply capacitors. Even in these cases, extending power planes beyond the area under the IC and its decoupling capacitors may not provide any real benefit.

1 Like