I need to route a power rail carrying a current of 5 A with a temp rise of 20oc and 1 oz copper. Based on standard trace width calculators, this requires roughly a 95-mil equivalent trace width. But the component density makes running a standard wide trace difficult.
If I replace the trace with a copper pour/polygon pouring around these components, what key issues should I watch out for regarding localized current necking, thermal relief on SMT pads, and manufacturing yields?
Is switching to an inner layer generally preferred over irregular outer-layer copper pours in dense designs?
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Route a power plane is not a must. You can route the PDN using tracks on the top layer or the bottom layer. In fact my favorite Stack Layer (4 Layers) is: Power + Signals//GND//GND//Power + Signals
Your goal has to be minimize “L dI/dt”. So reduce the distance between Power Lines and the Return Path as much as possible. Regarding “copper pour” quite oft creates more problems than benefits. As a general rule, copper pour is something to avoid.