Hello Everyone,
My company has had trouble with a series of PCB failures. These failures include cracked vias and laminate separation. The via failures apply to both microvias and standard via barrels, both through-hole and buried. There appears to be a lack of adhesion between layers. The majority of the failures appear to occur directly under BGA parts, primarily Xilinx Artix 7 FPGA. In other words, the bottom-most layers of the board do not show notable failures since no BGA parts are assembled on the bottom layer.
Here are some basic characteristics of the boards:
- Laminate/prepreg: FR408HR
- Number of Layers: 10
- Number of Laminations: 3
- Leaded Solder
- Approximate Board Area: 2.00" x 2.50"
- Through-hole vias are filled with Taiyo after plating
- Microvias are fully copper-filled
We have seen the same failures on boards from two different fabrication and assembly plants. However, we haven’t seen any indication that the PCB layout design itself is a problem.
Here are some potential sources of failure we are pointing at:
- Lack of temperature control during the fabrication process
- Lack of temperature control during the assembly process
- Aged or improperly stored FR408HR material being used for fabrication
- Lack of proper planarization or cleaning prior to adhering layers
Images of the PCB stackup and cross-section photos are included to illustrate the problems.
I appreciate you taking a look at my post. I would love to hear your feedback.
Thanks!
Ian
(Since this is my first post, apparently I can only post one photo. Sorry for the montage!)
