In a standard 4-layer PCB with a signal-ground-power-signal stackup, when adding copper pours on the top and bottom layers and stitching them to the ground plane, the common guideline is to space the stitching vias at intervals of λ/20. However, could an excessive number of vias in the power plane introduce unwanted effects, such as increased inductance or larger current loops? Are these impacts typically negligible, or is there a practical minimum spacing for the stitching vias to balance performance and avoid potential issues?
Cutting into the power plane with via stitching does increase resistance and inductance, but the effects are typically negligible for most digital or RF applications.
For instance, If you were to reduce a 1 sq. in. section of a power plane by 50% (assuming 0.5 oz copper), the DC resistance would increase from approximately 0.41 mΩ to 0.82 mΩ. This small change is unlikely to impact most applications significantly.
Regarding inductance, removing 50% of the plane would increase the inductance slightly—say, from about 1.15 nH/in to 2.10 nH/in, assuming a 40 mil plane spacing around the core. Again, this is unlikely to matter unless you’re working in the GHz range, where such small changes might become relevant.
Moreover, most via stitching fences don’t reduce copper cross-sectional area by 50%; the reduction is typically closer to 10-30%, which has even less impact. The additional current loop created by routing around vias in the stitching fence is very small because the vias are only tens of mils apart. This adds an inductance of only tens to hundreds of pH, which is trivial unless you’re dealing with very high-frequency signals and relying on the plane as a critical reference. In most cases, the benefits of stitching for grounding or shielding purposes, such as improved signal integrity and reduced noise, significantly outweigh any minimal increases in resistance or inductance.
It is likely that the key risk is one that is unlikely to happen on real boards. That being that the stitching vias are placed so close together that their antipads on the power layer meet and thus block the current flow completely. At a 20th wavelength spacing on a board with realistic via sizes, this is not going to be a problem.
What is perhaps less clear is the benefit of putting GND pours on the two outer layers. Depending on the other signals on the board, this may create more problems than it is thought to solve. If the design involves RF and you want to via fence the RF tracks by creating a co-planar GND structure on the signal layer that is tied into the GND plane immediately below, there is a significant benefit to be had. Otherwise it is quite possible that things are being made worse.
Consider two adjacent tracks that you do not want to couple to each other very much, you could put GND in between them. But does this help? Suppose the signal on the aggressor results in a rise in the concentration of negative charge carriers, then in the GND structure there will be a repulsion of electrons that will affect the width of the track, so the influence is seen in GND adjacent to the victim track. As the GND vias are perhaps 10mm apart, so the coupling to the victim track is seen over much of this distance. If the GND was not present and you simply had a single wide gap between the two tracks, the coupling would be lower. Thus with typical track and gap spacings of say 0.1mm, the 0.1mm gap + 0.1mm track (connected to GND) + 0.1mm gap between aggressor and victim is not as good as if you just had a 0.3mm gap.
Having a GND pour adjacent to the power plane does help because it gives you capacitance, though it may not give you much, even if the power to GND separation is very small. Increasing the amount of GND copper can increase the current carrying capacity of the GND, but this is only likely to be a benefit below 10kHz or so. Above this point the currents mostly flow immediately adjacent to the signal (or power) tracks carrying the current.
Subject to the application, in a sig-gnd-pwr-sig stackup, it is quite likely that the additional ground pours may not give any benefits worth having, and could quite easily make things worse. But the presence of 20th wavelength spaced stitching vias are not likely to cause problems.