Ask Me Anything about Signal Integrity

Events Ask Me Anything
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Are you struggling with signal integrity issues? Whether it’s impedance matching, minimizing reflections, or any other SI aspects, we understand the importance of finding effective solutions.

That’s why we’re thrilled to invite you to our upcoming Ask Me Anything session, where our design engineering team will be on standby to address your toughest SI challenges.

:spiral_calendar: Date: May 8th, 2024

:speech_balloon: Question submission window: May 2nd to May 8th

:round_pushpin: Platform: Post in this thread

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What are some low cost tool / methods to induce noise onto traces / cables to check for SI issues?

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Good question, because ”low cost” always inspires engineers. Caveat: Without knowing exactly what you’re trying to fix, you might make things worse. That said, we made this a watercooler question for some of my fellow engineers to put in their two cents worth. Answers are listed below, from best to worst.

  1. Place an extension cord across the area of the circuitry. Especially if it’s plugged into a fluorescent light.
  2. Add stubs and/or screw up the impedance by taking copper tape and sticking it to the traces of concern.
  3. More or less the same thing, tack a 1K resistor to any controlled impedance traces.
  4. Increase the loss by taking a small ceramic capacitor and connecting it from the area of interest to ground.
  5. Increase and decrease the power supply voltages.
  6. Place a magnet on top of sensitive traces.
  7. Use a hair dryer (avoid heat guns on this one) to heat up sensitive circuits.
  8. Smear peanut butter and jelly on any sensitive traces. LOL

Most of these are likely to work, and most will be fun at the same time. If you have access to a vector network analyzer you might look at the smith chart function for information as to what the circuit really “looks” like to the signal.

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What are the scenarios, from a Signal Integrity or EMC perspective, where Copper Pours can be a bad idea?

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I can only think of two, the first being having too much copper too close to any signals as it will capacitively load the signal trace. The other is when it creates an unbalanced distribution of copper, creating a bad board profile and leaning towards warpage.

Best,

Allan

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I can only think of two, the first being having too much copper too close to any signals as it will capacitively load the signal trace. The other is when it creates an unbalanced distribution of copper, creating a bad board profile and leaning towards warpage.

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Interesting! I have heard something similar from Rick Hartley’s talks which is exactly why I was asking. Do you have any advice to keeping proper spacing for signals and pours to help prevent PCB Warpage?

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Hi Alexander!

Signal traces are rarely if ever large enough is area to cause these kind of problems. You just need to keep the pours far enough away to maintain their integrity. When a board is badly unbalanced, coppers pours might be contributing when they are all in the same area. We don’t have a lot of problem with warping these days, with the exception of very thin boards, IMS (Insulated Metal Substrate), and the occasional heavy copper, high power boards. One way to ameliorate this is to switch from solid ground pours and planes to cross-hatched ones thereby reducing the copper amount.

Best,

Allan

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