I’m trying to understand the best practice for filling unused areas on signal layers. I’ve seen conflicting guidance: some recommend leaving copper thieving to the fabricator for copper balance, while others use GND pours to improve shielding and provide additional return paths. Poorly stitched GND pours, however, can potentially affect return currents and controlled impedance.
For those designing with high-speed signals, what is your practical rule of thumb? Is there a point where one approach is safer, or a minimum via-stitching strategy to avoid return path issues?
One reason some designers avoid isolated copper dots is that floating copper can behave unpredictably at high frequencies and create unwanted coupling.
Instead of automatically filling the area with GND, it can sometimes be more useful to extend the power distribution or another intentional net.
From my limited experience, though, I wouldn’t treat fab-side copper thieving as a major SI problem by default. In many designs, leaving the unused area to the fabricator’s standard copper-balancing process works fine.
I wouldn’t use a fixed via-stitching rule for every high-speed design. I’d place stitching vias where they provide a clear, low-inductance path between the pour and its reference plane, especially near layer transitions, connectors, and areas where the return current would otherwise have to detour. The required spacing really depends on the signal rise time and the stackup geometry, rather than just the clock frequency.
One thing I’d add is that a GND pour shouldn’t be relied on as a substitute for a solid reference plane. High-speed return currents tend to follow the path of lowest impedance, which is close to the trace when there is a continuous reference plane.
For high-speed signals, I’d first make sure the signal has a continuous, unsplit nearby reference plane, and then treat the GND pour as supplemental copper for shielding or other purposes. If the primary reference plane is solid, signal integrity is much less dependent on how well the supplemental pour is stitched.
If the primary reference plane is split or missing, however, the return current may have to use the pour, making its stitching and geometry much more important.