I have a 4-layer PCB with layer stack-up as follows Signal-GND-Power-Signal. The board operates at either 8 MHz (3.3V) or 16 MHz (5V) with no active RF components—just SPI-based surface-mounted devices. The total size of the PCB is around 5cm x 4cm. The board is purely digital. Currently, I have copper pours on the ground and power layers but not on the signal layers (top and bottom). Given these conditions, would adding copper pours to the top and bottom signal layers make any significant difference?
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Copper pours can be helpful in certain situations, but they should be used with careful consideration. While they can improve thermal conductivity, reduce etch solution usage, and help with warping or track reinforcement, they aren’t a one-size-fits-all solution.
In a purely digital board, copper pours on signal layers may introduce unwanted effects, such as increased stray capacitance, unintentional signal coupling, or even acting as an antenna. These issues can complicate debugging and signal integrity. It’s also easy to fall into the mindset that simply adding more copper will improve grounding, which isn’t always the case.
Instead of defaulting to copper pours, focus on a well-thought-out grounding strategy and intentional routing. If you’re using copper pours, ensure that they’re tied to the correct ground and won’t inadvertently interfere with your signal paths. Ultimately, adding copper pours on signal layers isn’t necessary unless you’re addressing specific thermal or mechanical concerns, or need to optimize for these factors.
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There is already one very good answer that has been given by BerndKruger, but we can develop that a bit more. Before this can be done, the need for what is about to be put forward needs to be established. To do that, one question needs to be answered: do you intend to pass signals between the top and bottom signal routing layers? If the answer to this is “no”, there is nothing to add to the reply already given, but if it is “yes” the next question is whether you have considered where the displacement current will flow?
When you have a signal routed next to a plane, the flow of current in the signal induces a flow in the adjacent plane that flows back following the path of the signal trace. Let’s suppose that this current is flowing in the GND plane. If the signal has frequency components that are >50 kHz, this is not a poorly defined current flow, the majority of it is following the trace that induced it, turn for turn. But what happens when the signal passes through a via to the other side of the board?
When the current passes through the trace on the other side of the board, a displacement current is induced in the other plane, the Power plane. This is a problem because the displacement current in one plane is not connected to the other plane, so the energy spreads out and this is the start of radiated emissions from your board. When this energy concentration reaches the edge of the board, it can radiate into the surrounding environment. If you have a connector there, this energy can also couple into the cable, especially if it has direct connection to the GND plane. Now the GND (which may be the shield) acts as an antenna and radiates this unwanted energy better.
The way to stop this is to have a link between the two planes very close to the point where the signal via is, but they’re not the same voltage. A solution to that is to link them through a decoupling capacitor, but this is adding cost and taking board space, but worse, a low impedance link is hard to do since a typical decoupler (100nF 0402) has an impedance that above about 50 MHz is dominated by its inductance. In the frequency range 50 MHz to 1 GHz, the decoupler is not doing much to help you.
The other solution is to make both of the planes be GND. If this is the case you can place a GND stitching via right next to the signal via - problem solved. Of course, your power network has to be routed as traces on the two signal layers, but this is not usually difficult to do. Now that you are routing power on the signal layers, it makes a lot of sense to make them wider. There are tools on the internet that will tell you the minimum width for a given current. Just route the board with the width they indicate (or wider) and the problem is solved.
If you now want to use copper pours over the power traces, go ahead. You still need to think about it, since the accidental creation of an antenna structure by using copper our thoughtlessly is still easy. Carefully placed pours create no such problems.
The end result is that the board is likely to be very quiet (assuming other EMC related rules have been upheld). To get the best out of this, maximise the coupling between the signal layers and the GND layers by making the separation be small (typically 0.1mm) so your stackup becomes: signal - (0.1mm) - GND - (1.3mm) - GND - (0.1mm) - signal. Power is routed with the signals.
As an indicator of how good this stackup can be, my 4-layer boards usually have multiple USB3 (5 or 10 Gbps) links, PCIe (2.5 or 5 Gbps), Ethernet (1 Gbps, with PoE), several RF modules and traditional interfaces (SPI, I2C, RS-232/422/485, etc.) and the worst spike had a peak reading that was 15 dB below the class B limit line (and the quasi-peak was rather lower again). This level of performance I cannot achieve when I have a power plane and GND plane, but is easy to reach with two GND planes instead.
Conclusion, get the stackup right first, now use the free space on signal layers to selectively widen the power traces, and don’t forget that wherever a signal passes from one layer to the opposite side, put a GND stitching via next to it for the displacement current. Search your board for areas that look short of stitching vias and add a few vias extra (to reduce cavity size and push up cavity resonant frequencies). And last, never cut the GND planes, read Bogatin on this one, there are practically no situations when GND plane cuts help, they usually just spoil things.
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For such a small design board operating at 8 MHz or 16 MHz, a simple two-layer design could be sufficient, especially if you’re not dealing with complex signal integrity concerns. If you opt for a multi-layer board, bringing the power and ground planes closer together can improve power supply decoupling without relying heavily on surface copper pours. Just keep in mind that surface pours, while helpful for thermal management, can introduce EMI issues by acting as antennas, especially near fast-switching nodes.
For small-scale production, the cost comes more from the area and layer count of the PCB rather than the amount of copper used, so adding large pours doesn’t necessarily save you money. If thermal concerns aren’t a factor, it may be best to skip unnecessary copper fills on the signal layers to avoid signal coupling issues.
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I agree with the points made about copper pours and their potential drawbacks. One additional consideration is the effect of parasitic capacitance, which can occur when copper pours are placed too liberally on signal layers. This extra capacitance might unintentionally couple noise between different parts of the circuit—such as from a high-speed switching power supply to sensitive analog components like an op-amp feedback loop located elsewhere on the board. In some cases, this parasitic coupling can degrade the performance of your circuit, especially in sensitive or high-impedance areas. It’s worth carefully evaluating the placement of copper fills to ensure they don’t inadvertently create paths for interference between unrelated signals.
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