When designing a PCB, I’ve learned that it’s often best to design the ground signals to:
Follow the signal in reverse, creating a return path that mirrors the outgoing path.
Avoid daisy chaining and instead connect back in a “star” configuration.
Minimize the return path length.
Maintain the same trace width as the signal.
However, here’s where I’m confused: I’ve also seen recommendations to do a polygon pour for the GND net on both sides of the PCB. I primarily work with through-hole components on two-sided boards operating at <= 20 MHz frequencies, using 1 oz copper, FR-4, 1.6mm thickness, and ENIG finish.
Once I pour the copper, it seems like the carefully designed ground traces become irrelevant. If I’m using ground pours, do I still need to adhere to the “no daisy-chaining of ground” rule?
Additionally, I tend to route most signals on the top layer, keeping the ground layer less crowded. Is this practice actually beneficial, or is it just as effective to have a balanced distribution of traces on both sides?
Lastly, would there be any advantage to pouring VCC instead of GND on the top layer, especially if that layer is already densely populated with signal traces?
Ideally, the return traces will no longer be visible, because they’ll be fully included in an unbroken ground pour.
Usually, the ground pour is not perfect; having the return traces there first can serve as a reminder that “when you do have to break up the pour, at least try not to do it here”.
Well, if you’re using thru-hole components on a two layer board then you want your ground pour on the bottom. And the currents will always take the path of least resistance, but your routing the ground is useful. I’ve often run ground traces to verify netlist DRC is ok, the place the plane or pour later when I’m happy with everything.
I also tend towards routing everything I can on the top layer, avoiding vias and using Microstrip. The idea of a “single point ground” doesn’t seem to be popular anymore, but you definitely want to avoid daisy-chaining ground. I guess you could think of the pour or a plane as your “star” point. If it’s absolutely necessary to make a voltage net pour on an external layer I think the bottom is better, mostly because I picture myself shorting Vcc to something every time I go to probe or if I drop a screw, etc. Of course soldermask helps a ton on that and you could conformal coat if you need to. The problem with laying out most boards is someone else makes up half the rules, assigning how many layers they want, where some stuff is placed, whether they can coat a board, etc. And that someone else is usually the customer…