Hi, thanks for this incentive! I have a mixed signal design with a grounded CPWG as a transmission line for Lora (primarily for Europe, so 868 MHz) on a 4-layer 62 mil board. Lots of good info on influence of copper roughness, drawbacks of Cu-Ni interfaces, dielectric loss from solder mask… However what if I can only choose between 1) a solder mask over the transmission line or 2) leaded HASL. The trace would be about 50 mil wide, with the reference plane on layer 3 or 4 and the characteristic impedance of 50 Ohm. Thanks for your thoughts! Marko Dukši
Your choice will actually depend on this app, for instance:
for high-speed digital such as DDR5, PCIe, SerDes, ENIG or ENEPIG will be fine if pitch is needed, or Immersion Ag if lower loss is preferred,
for RF/microwave (above 10 GHz), you shall consider OSP + very low profile copper - should work really well,
for balancing the performance and reliability - Immersion Ag or ENEPIG.
Elaborating on the last point in a bit more detailed way: in high-frequency applications (read: GHz range), rough Cu increases conductor loss due to the skin effect, where high-frequency signals travel mostly along the outermost layers of the conductor. So the best practice would be to use smooth, low-profile copper such as, for instance, rolled annealed copper or very-low-profile copper, to reduce insertion loss and impedance variations. For frequencies above 10 GHz, the use of OSP with very smooth copper (like VLP or RTF) is a common choice to reduce loss.
Interesting. Let us break it down to see if we can come up with something creative.
Analyzing the impact of solder mask vs. HASL
solder mask: acts as an additional dielectric, altering the impedance but only slightly. It also introduces some dielectric loss, but at 868 MHz, this should be fairly minimal. As a general result, we shall expect a smoother surface than HASL, meaning less conductor loss from roughness.
HASL: has a tendency to create an uneven and rough surface (= higher conductor loss). SnPb has a higher resistivity than Cu, increasing skin-effect losses. Furthermore, the solder layer can increase impedance slightly due to the lower conductivity. The Cu-Ni-Sn transition (if Ni is present) can introduce additional loss. Since HASL thickness is non-uniform, we risk introducing impedance variations along the trace.
Consequences on CPWG at 868 MHz?
Since the trace width is 50 mil with a reference plane on layer 3 or 4, and 868 MHz is relatively low compared to mmWave applications, losses from Cu roughness and dielectric absorption should not be as severe as in GHz-range RF designs. However, the HASL surface roughness and added resistance will still increase conductor loss, specifically in a CPWG where current density is concentrated on the surface. We might expect that solder mask will affect impedance, but in a predictable way, whereas HASL can lead to inconsistencies. So solder mask would be a better choice here.
If I can propose any optimization that one would be related to PCB stack:
if possible, use low-profile copper on Layer 1 - you will reduce roughness-related loss,
consider keeping solder mask thin over the CPWG - this will minimize its impact on impedance,
if you cannot avoid HASL, try to specify a very thin and uniform finish. This will still be suboptimal compared to ENIG, immersion silver, or OSP finishes.
To answer that we would first of all, need to discover what this problem is related to. There might be a few causes:
Ni corrosion - caused by defective ENIG plating process (there is an excessive phosphorus buildup in the electroless Ni layer that leads to corrosion and poor solder adhesion). If this is really corrosion then you should see dark, rough, or non-reflective pads under solder and weak solder joints that can fail under stress. To fix that, ENIG process shall be strictly monitored and has a very low level of phosphor. Best would be switching to ENEPIG which adds a Pd barrier to prevent Ni oxidation and therefore, corrosion.
Way too low Au thickness or poor Au coverage - Ni is not protected well enough. You can recognize that by, for instance, variation in solder joint appearance across the board. To fix that, Au layer thickness shall be increased - verify this thickness with XRF after plating.
Contaminants or Ni oxidation (when Au layer is too thin) - this would happen if solder does not spread or form a reliable bond, and/or some pads wet fine, while others do not. If this is the case, then try to store PCBs in a dry, nitrogen environment if they do not go for assembling immediately. You can also consider brushing or chemical cleaning of pads before solder paste application, and increasing flux activity in your solder paste.
Too low reflow temperature - solder might not fully wet the ENIG surface. To fix that you shall manage the correct temp based on the solder paste specs. You can also use nitrogen reflow to minimize oxidation.
Poor quality paste, or an old one.
Alternatively, you can change the surface finish to ENEPIG, which prevents nickel corrosion, or Immersion Ag for better solderability.
Indeed, it is highly prone to oxidation and tarnishing. A few recommendations you can try out:
Use vacuum-sealed moisture barrier bags (MBB) with desiccants. Include a humidity indicator card inside the bag to monitor conditions.
Store in a dry nitrogen or low-humidity environment. Alternatively, use a dry air cabinet with humidity control.
Keep boards away from sulfur and contaminants.
Control temperature and humidity in storage areas.
If boards are older, use a mild cleaning process before assembly.
If long-term storage is a concern, you might consider switching to ENEPIG instead of Immersion Ag, as it has better shelf life while maintaining excellent solderability.