Webinar: Practical Techniques for Ensuring Power Integrity in High-Speed Designs

Join Sierra and Rohde as we tackle real-world PI challenges in high-speed PCB design, from design best practices to measurement techniques that validate your PDN.

What we’ll cover:

  • Common PI disruptors: SSN, voltage ripple, ground bounce, EMI
  • Power plane and stack-up design tips for noise mitigation
  • Return path control and loop inductance management
  • Smart decoupling capacitor strategies
  • Frequency- vs. time-domain PI analysis
  • Measuring PDN impedance using VNA & TDR
  • Interpreting voltage droop and transient response
  • Probing tips for accurate, repeatable results

Click the link below to register. You can ask your questions in this thread.

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