RF designs are unforgiving—and sometimes even flawless circuits fail at the fab or assembly stage. Let’s talk about how to avoid that.
In this webinar, we’ll break down the DFM and DFA practices that every RF designer should know—especially if you’re working on 5G, IoT, radar, or satellite systems.
We’ll cover the design rules that matter most:
Choosing the right materials and stack-ups
Avoiding impedance mismatches and antenna headaches
Making sure your layout can actually be assembled without surprises
And why surface finish, via structure, and spacing rules can make or break your prototype
This one’s for designers who want to get it right the first time—no re-spins, no guesswork.
Missed the webinar? Click the link below to watch the recording.
When striving to minimize impedance discontinuities along, say, a GCPW antenna feed line, packages that we need to use for components that are part of the tuning network and/or ESD protection (https://www.ti.com/product/TPD1E0B04) need to be rather small (0402 imperial at most). What footprint would we prefer for shunt components given that signal integrity calls for eliminating stubs and thermal relief spokes on the “pad” that is on the coplanar ground side, while at the same time this results in a large thermal imbalance of the two pads and goes against DFA for preventing tombstoning?
Hi Marko,
You have asked multiple questions in same line. if you could break it down it would be easier to understand, also if you can give any image of layout that would also be helpful in understanding the question,
Nowadays the thermal relief pads are not needed for SMD components and reflow machines and they were mostly used for through hole components, also unclear how tombstoning comes into picture here.
keep the Component pads close to antenna to reduce the length, its not a stub but have that length small.
There is only one question, “what footprint would we prefer” and everything else is the necessary context. I am adding a screenshot of an example of preferred footprints for good signal integrity - no thermal relief allowed for pads, even on the ground pour side. I have circled in blue the two shunt components who’s opposite pads have drastically different thermal mass. For both components the pads on the feed line are small, but the pads on the ground side are part of the ground pour. For small capacitors this is a recipe for tombstoning.
Some components, especially connectors, have to be on board edges. What are your requirements for those?
For components like connectors that must be placed on board edges:
1. You can opt for hand assembly for low volumes or use a reflow fixture to support the connector during automated assembly for higher volumes.
2. You must check board cutouts and adequate spacing, especially when boards are manufactured in an array, to accommodate the connectors effectively.
Is it normal for manufacturers to usually adjust the soldermask expansion and solder paste expansion to meet their own manufacturing/design needs?
Yes, it is standard practice for manufacturers to adjust soldermask expansion and solder paste expansion to align with their specific manufacturing processes and design requirements. These adjustments ensure sufficient clearances to accommodate manufacturing tolerances, enabling reliable production and assembly.
Is it safe for the designer to have no soldermask expansion and no paste expansion (and just leave it to the manufacturers to adjust according to their needs)?
Yes, it is generally safe for designers to specify no soldermask expansion or paste expansion, allowing manufacturers to adjust these parameters based on their process requirements. However, any solder mask-defined pads must be explicitly identified and communicated to the manufacturer to ensure accurate fabrication.
Is there a simple way to transfer fab capabilities from Sierra into Altium? That’s always a confusing part for me.
We have provided the start and configuration files required for Altium import. You can access these directly from our online tool on our website via the below link.
When you add a QR code to the silkscreen, what format should the QR code be in?
When adding a QR code to the silkscreen, the QR code should encode a standardized format that includes: 1. A date/year code in YYWW format (e.g., year and week number). 2. A UL code, if required, for regulatory compliance. 3. Vendor-specific markings for identification. 4. Serialization details, comprising a board number (xxx) and panel number (yyy), formatted as xxx-yyy.
This ensures the QR code contains all necessary information for traceability and manufacturing purposes.
