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| Question | Answer |
|---|---|
| I have read the loop area is not a 2 dimensional concept but 4 dimensional reality with transmission line length and impedance. There is no loop or return. There is a source of energy and a destination for the energy. This goes in one direction, in the transmission line. If loops were true, there would be no signal integrity or EMC issues. What does it mean? We always follow smallest loop area. What’s your opinion? |
I believe the transmission-line perspective is the better way to think about it. You’re right that there is a source of energy and a destination for that energy. The energy travels in one direction, and our goal as designers is to create PCB structures that support and control that energy flow. A shorthand I often use when teaching EMC is: Build more transmission lines and fewer antennas. Transmission lines contain and guide energy only to where we want it to go. Antennas, on the other hand, allow energy to radiate unintentionally into the surrounding environment. That said, when designing good transmission lines, thinking about loop distances can still be useful. This is where the two concepts often overlap. Depending on how you visualize the problem, the idea of keeping loops small can serve as a practical shorthand. For example, if you’re accustomed to thinking in terms of schematics and are now translating that design into a physical PCB layout, the concept of minimizing loop area can be a helpful mental model. In many cases, it simply guides you toward creating a shorter, better-controlled transmission path, ensuring that energy travels only where intended rather than wandering across the board and causing signal integrity issues, crosstalk, or unwanted emissions. So, fundamentally, I agree with the transmission-line viewpoint. However, I also understand why EMC engineers continue to talk about loop areas. In many situations, it remains a useful shorthand for describing layout practices that ultimately help create better transmission lines and reduce unintended radiation. This version keeps the expert’s opinion intact while making it more concise, professional, and easier to follow. |
| What are the ground loop considerations when the CM signal return / GND is connected at both ends of a ribbon cable? | A ribbon cable typically contains multiple signal conductors and only one or two ground conductors. For a ribbon cable to function properly, the ground conductors must be connected at both ends. The transmission line requires a return path, and that ground connection provides it. The challenge with ribbon cables is that multiple signal conductors often share the same return conductor. As a result, many signals are forced to coexist within the same physical structure, all referencing the same return path. A useful analogy is to imagine a coaxial cable with one outer conductor but five separate inner conductors. In that situation, all five signals would share the same return conductor and electromagnetic space. Their energy, information, and fields would all exist within the same dielectric region, increasing the likelihood of interaction between signals. Under these conditions, signal integrity issues are not necessarily inevitable, but the probability of problems increases significantly. Because of this, I don’t typically think of ground loops as the primary concern with ribbon cables. Instead, I focus on signal integrity challenges and potentially increased radiated emissions resulting from multiple signal conductors sharing a common return path. |
| When you talked about your stack-up calculator, you talked about trace spacing. Is that spacing between the differential pair or between two unrelated traces? | Here is a refined version of the expert’s answer that improves clarity and readability while preserving the original meaning and technical opinion: When calculating impedance for a differential pair, the spacing refers to the distance between the two traces that form the differential pair. We also support coplanar models, where you need to specify the spacing between the signal trace and the adjacent coplanar ground traces. That spacing influences the characteristic impedance as well. In addition, we have another calculator based on the IPC-2221B standard. That tool focuses on high-voltage applications and helps determine the required conductor spacing for a given voltage difference, ensuring adequate electrical clearance. So, there are several different types of spacing to consider, depending on the application and the purpose of the calculation. If I could add a broader perspective, while the tool itself is focused on differential-pair spacing, trace spacing between unrelated circuits can also be important. For example, you may want to separate sensitive low-voltage analog signals from fast-switching, high-speed digital signals. Many datasheets recommend splitting analog and digital grounds to achieve this isolation. However, creating ground-plane splits can sometimes increase the risk of radiated emissions problems. In many cases, you can achieve the required isolation and protection simply by providing sufficient physical spacing between the analog and digital circuits, without introducing a ground split. This version retains the expert’s viewpoint while making the explanation more structured and professional. |
| How feasible is it to use PCB signal GND as a return path for current through OV protection devices, rather than a chassis GND, if chassis GND is not easily connected to the PCB? | I don’t typically think of overvoltage protection circuits as being primarily an EMC-specific concern. My general sense is that using the PCB signal ground as the return path is usually not a problem if the chassis ground cannot be easily connected to the PCB. That said, it may introduce a somewhat higher level of risk compared to having a direct chassis-ground connection. |
| Is there an easy way to identify unintended traces/ copper segments that could be potential antennas in a PCB layout? | In general, any open-ended trace can act as an antenna. That’s a valid statement. However, the traces that tend to be the most effective antennas are those whose length happens to be close to one-quarter of the wavelength of a noise source or signal frequency present in the system. Common examples include via stubs, short unterminated traces, and even test points on prototype boards. When you’re working with frequencies in the single-digit megahertz range or even tens of megahertz, these features are often electrically short enough that, while they technically behave as antennas, they are unlikely to cause significant problems. The situation changes at much higher frequencies. Take the same PCB layout with the same short stubs, but now use it in a system carrying gigabit-per-second communications. Those previously insignificant structures can become very efficient radiators and create substantial EMI issues. That’s why examining the relationship between physical dimensions and operating frequencies can be extremely valuable. Understanding that correlation often helps identify which traces, stubs, or copper features are most likely to become problematic antennas in a design. |
| How does harness length influence radiated emissions and immunity performance in automotive LED lighting systems? | Harness length can have a significant impact on radiated emissions and immunity performance, particularly when the harness length approaches a quarter wavelength of the switching noise frequencies present in the system. This is often a major concern in LED lighting systems. LEDs typically require power conversion to achieve the operating voltage and current they need, which means there is usually a switching power supply somewhere on the LED control board. In applications such as automotive headlights, switching often involves relatively high currents, making it a strong source of electromagnetic noise. If the harness length happens to align with the wavelengths associated with those switching frequencies, the harness can become an efficient radiator, leading to increased emissions and potential EMC issues. Another important factor is harness orientation. I encountered this firsthand while working at Ford. During bench testing, cable harnesses are typically laid out horizontally and flat. In one case, a particular headlamp passed EMC testing without any issues under those conditions. However, when the same headlamp was installed in a Ford F-250, the harness exited the headlamp assembly and then ran vertically downward for a considerable distance. That routing placed the harness in near-perfect alignment with the vehicle’s FM radio antennas. As a result, a design that had performed well during bench testing suddenly began interfering with FM radio reception across much of the spectrum. The only significant change was the orientation of the harness from a flat horizontal layout during testing to a vertical routing inside the vehicle. It is a good example of a factor that may not initially seem important, yet it can have a dramatic impact on EMC performance in real-world installations. |
| Is there a big improvement in EMC performance when a signal layer is referenced to an adjacent ground plane versus referenced to an adjacent power plane? | Interestingly, while many designers would intuitively prefer a signal layer to be referenced to an adjacent ground plane, an adjacent power plane often performs nearly as well from an EMC perspective. When it comes to forming effective transmission-line structures, both ground and power planes can help contain and guide electromagnetic fields. As a result, a signal layer referenced to a nearby power plane can still provide good field containment and controlled signal propagation. From a schematic or conceptual standpoint, an adjacent ground plane is often considered the preferred reference. However, in practice, an adjacent power plane usually works just fine and may offer comparable EMC performance in many situations. |
| Follow-up to the ribbon cable question. When you connect GND at both ends of a ribbon cable, you are forming a physical loop in the GND connections if the source and destination GNDs are not isolated. Is this, necessarily, a GND loop? | Let’s consider a scenario where a motherboard and a daughterboard are connected by a ribbon cable carrying signals, while a separate power cable carries power and return current between the two boards. In that case, you have a ground connection through the power cable and another ground connection through the ribbon cable. The question then becomes whether this arrangement constitutes a ground loop. Assuming this is close to the physical situation being described, my view is that if all the ground connections are relatively short—for example, in a motherboard-to-daughterboard arrangement where the boards are only a few centimeters apart and you’re not operating at extremely high frequencies or data rates, I would generally not be overly concerned about ground loops. The more significant risk in this scenario is that noise present on the power return conductor could circulate through the ribbon cable ground conductors and potentially create signal integrity issues. However, if the interconnections are short and the frequencies involved are not exceptionally high, I would not expect this to be a major concern. It’s also worth noting that at very high frequencies, noise currents tend to remain localized rather than spreading throughout the entire ground network. As a result, the classic notion of a large circulating ground loop often becomes less relevant in those situations. So, while it is theoretically possible that this configuration could create a ground-loop-related issue, the specific combination of physical dimensions, frequencies, and noise conditions required for it to become a significant problem is likely to be relatively limited. |
| When does a GND need to be isolated from another GND? For example, digital circuits and analog circuit GNDs. | When it comes to separating digital and analog grounds, the answer is almost never. The situations where ground isolation is truly required are typically found in high-power systems. For example, in a solar inverter, you may have a high-voltage DC side and a high-voltage AC side. In such cases, there are both safety and functional reasons for maintaining isolation between the grounds. For lower-power systems, including most designs that contain both digital and analog circuitry, separate ground planes are generally unnecessary. In most cases, providing adequate physical separation between the analog and digital sections of the design is sufficient, rather than creating a split or isolated ground structure. As a result, the circumstances where digital and analog grounds genuinely need to be separated are quite rare. The situations where ground isolation is truly essential are much more commonly associated with high-power power-electronics applications, where safety and system-level requirements demand it. |
| Also, when do I need to make my vias blind/buried or back drilling instead of going all the way through the board? Is it just when the unused via section is greater than lambda/20? | Back drilling is generally required when you have a long via stub length that can impact signal performance. As mentioned in the previous question, it largely depends on the operating frequency. At very low frequencies, the via stub may not be an issue. However, when working at very high frequencies, it can become problematic. In such cases, back drilling or the use of blind and buried vias may be necessary. That said, using blind and buried vias increases manufacturing costs. For example, implementing buried vias or multiple layers of blind vias requires additional lamination cycles. If sequential lamination is involved, the cost increases further. Ultimately, you need to evaluate the trade-offs and determine the solution that best suits your design requirements and priorities. |
| What is your recommendation for placement and spacing of ground stitching vias next to signal vias to maintain return-current continuity and reduce EMC issues? | The spacing between two adjacent ground stitching vias should range between λ/20 and λ/10, where λ is the signal’s operating wavelength. |
| Are ferrite beads bad because some people say it might cause resonance issues? | Ferrite beads can be problematic, and resonance issues are certainly one reason why. However, in my view, that is not the primary concern. One of the main issues with ferrite beads is that they are often added to a design after a problem has already been identified, making them more of a Band-Aid solution than a root-cause fix. In many cases, ferrite beads add cost and occupy board space, while the frequency range over which they are effective is somewhat limited. If they are used in circuits carrying significant DC current, they can also saturate. So, while ferrite beads are not my preferred solution, you are absolutely correct that resonance can become an issue. When you place a ferrite bead into a circuit, you are introducing inductance into a physical structure that already contains resistance, inductance, and capacitance. As a result, you can unintentionally create a filter that, instead of providing the desired attenuation, behaves in the opposite manner. If the circuit happens to resonate at the filter’s resonant frequency, the ferrite bead may amplify the problem rather than mitigate it. That said, this situation is relatively uncommon and usually requires an unfortunate combination of conditions. The outcome depends not only on the filter parameters that might be modeled in a SPICE simulation, but also on various parasitic effects, such as component placement, trace lengths, and the proximity of conductive structures like chassis enclosures. |