Smart Prepreg Selections

Design and Layout
1

I am using Sierra’s wonderful online Stackup Design tool to plan this stack-up:

image
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I want to keep all traces >5mil on this design but the Tool picks 3-4mil thick prepreg layers which results in controlled impedance trace geometry <5mil for 50-SE / 100-Diff, so I research some different Isola 370HR prepreg/core options to get this 100ohmDiff trace geometry:

L1-L6 Shown (Top Half of the Stack)

StackDesign1004a
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My questions are:

  • Is it permissible/wise to spec 2 layers of 1080-71%, or of any prepreg in general?
  • Do the thicker prepreg and cores I propose affect the L1-L2 & L2-L3 microvias in any way?
  • The Stackup Planning Tool lists “1x24 Mil Core 0/0-46%” at the very middle of the stack (shown below). What material is this so I can research alternate thicknesses and maintain my overall PCB thickness target?

Screenshot 2024-10-04 121924
Screenshot 2024-10-04 1219241620×304 31.6 KB

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Hi Taylor,

  1. it is permissible to use two layers of prepreg in a stackup. Almost all prepregs in general can be used like this.
  2. thicker prepregs will make the microvias bigger. with an aspect ratio of 0.75:1 if you are using thicker prepregs the drill diameter will also be large.
  3. in the middle it is a 24 Mil filler Core with no copper on either side which is why it is written 0/0 i.e. 0 Oz / 0 Oz. you can use a smaller filler core to get to your required finished thickness.
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3

As was previously mentioned, microvia hole size drives the maximum thickness of the prepreg. You did not mention the via pitch restrictions so we cannot determine what you options might be. In general, if the design requires microvias, you are likely limited by via/component pad pitch which in turn also forces you into thinner dielectrics and that in turn forces narrower track widths for impedance control.

Note that your stackup should be balanced top to bottom to avoid warping issues. Your Altium stackup image is not balanced…but maybe the intention was only to show certain aspects of what you were seeing.

Keep in mind that Altium’s default material library does not represent any particular material so impedance calculation accuracy starts with more defined material inputs. Even with better material data, there is a good chance that at some point, a fabricator will request to use another material that is more available and likely has somewhat different specifications. I tend to lean towards getting the routing close, but let the fab shop adjust the track widths of impedance controlled nets to match their their rocess and materials.

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