Questions asked during the live Q&A:
22:21
How does uVia from L1-L2 & L2-L3 and so on affect the lamination steps?
24:41
What factors affect cost the most? I heard that picking other than green solder mask, while holding the minimum dam width, saves quite a bit of pricing vs other colors. What is different about the chemistry of green?
28:11
Why do you prefer foil outer layers as opposed to core outer layers?
30:18
What is the most popular layer count for PCBs with DDR3/FPGA/EtherNet? And layer definition?
31:11
Is there any difference in microstrip RF losses versus solder mask color?
32:28
Any high level guideline or rule of thumbs to reduce parasitic capacitance and crosstalk?
33:49
Can you make green solder mask thinner than other colors to reduce RF losses?
34:48
What’s different between a “package fabrication” process vs. a “board fabrication” process in terms of pitch of microvias from L1-L2?
43:13
Is it ok to route signals on a power plane if it is really necessary?
44:22
What can be done to improve the copper/drill alignment for PCBs with printed microwave filters that are scattered across a board?
53:40
Any high level guideline or rule of thumbs to do impedance matching?
56:04
For small form-factor PCB, typically used for solder-down modules; what guidelines in the stack-up do you recommend to minimize board warping during the assembly process?
1:02:43
What is your recommendation to make a thin board, 16 mil thick, more stiff. It is a 2 layer board. Where would you add the stiffening layer?