Thank you for your interest in our webinar on everything you need to know to get your first PCB manufactured. It will be presented by Amit Bahl.
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You can ask your questions on this thread.
| Question | Answer |
|---|---|
| Should the layout and schematic designer define the PCB stack-up, or should the board manufacturer provide the expected stack-up to be used in the layout CAD? Are stack-ups specific to each manufacturer, meaning the stack-up provided by one manufacturer may vary from another, or is there a standard consistency between manufacturers? | The PCB stack-up should be defined through collaboration between the layout/schematic designer and the board manufacturer. While designers may specify their preferred stack-up based on electrical and mechanical requirements, the manufacturer should provide the final stack-up to ensure feasibility and manufacturability. Stack-ups can vary between manufacturers due to different materials, processes, and capabilities. No universal standard stack-up applies across all manufacturers, so a stack-up provided by one manufacturer may not be identical to another. Confirming the stack-up with the chosen manufacturer is always recommended before finalizing the PCB design. |
| We often face challenges in communicating trace impedance requirements with the manufacturer. Recently, a manufacturer mentioned that they could not link impedance requirements to the Gerber manufacturing files. What is the best practice and most efficient way to convey trace impedance information to the manufacturer through Gerber files or other documentation? | Effectively communicating trace impedance requirements to the manufacturer ensures proper PCB fabrication. The best practice is to specify impedance requirements in the fabrication notes, which should be included alongside the Gerber files and stack-up information. Manufacturers use this information to run an impedance model and verify that the design meets the specified requirements. They will typically contact the customer before making any changes if adjustments are needed. Once the Gerber files are imported into the manufacturer’s CAM software, necessary modifications are applied, and manufacturing files are generated. The CAM software also identifies design violations and ensures compliance with the impedance specifications. Additionally, specific impedance instructions are included in the traveler documentation, ensuring that critical factors like dielectric thickness and trace width are measured and confirmed during the manufacturing process. |
| I always have trouble with the dielectric constant value when using the diff pair calculator. How do you find this value? | To communicate trace impedance requirements effectively to the manufacturer, provide detailed stack-up information and the Gerber files. Use Sierra Circuits’ Impedance Calculator. It will help you with a dielectric material construction table. This table allows designers to select appropriate materials for the PCB type and provides critical details such as dielectric thickness, resin content, dielectric constants, and dissipation factors at different frequencies. By sharing this information with the manufacturer, they can accurately model and verify the impedance requirements, ensuring proper fabrication. |
| Where can I find more information on the BOM Checker and its usefulness? I am interested in what issues it can address. | You can try our BOM Checker tool: https://www.protoexpress.com/tools/bom-checker-tool/ . Our tool checks for the following errors: 1. Duplication of reference designators 2. Compares reference designators with their quantity mentioned 3. Duplication of manufacturer part numbers 4. Incorrectly specified range of reference designators |
| When specifying IPC Standards, do you need to follow every specific standard, or can one just quote class 1, class 2, etc. standards, and Manufacturers know which standards to follow for each class? | It’s advisable to specify the exact IPC Standard you’re referring to, such as IPC-6012 class 2 or class 3. This ensures clarity and avoids confusion, as manufacturers will then know exactly which standards to follow for each class. |
| When putting in a copper weight for outer layers, should we put that as a ‘Finished’ copper weight? | When specifying the copper weight for outer layers, it’s generally considered as the finished copper weight, which includes the total thickness after plating. |
| How do I know when fiducials are required or not for the size of component? | Fiducials are crucial for proper component alignment, regardless of its size. They help automated machines accurately identify the board position and orientation during assembly. For multiple BGAs, use local fiducials to improve placement precision. Include at least 3 global fiducials on the board to ensure reliable alignment throughout the assembly process. |
| If a PCB has a 1 oz top layer, will the final thickness remain 1 oz, or will it increase to 1.5 oz or 2 oz after plating? | A 1oz top layer will maintain a total thickness of 1oz and will not increase to 1.5 oz or 2 oz after plating. The plating process adds a thin layer to the surface, but it does not change the overall copper weight specified for the top layer. |
| How can you select your stack up before routing if things change during routing? For example, you decide to change the trace path of a particular signal. Is it more of an iterative process with the manufacturer? | Yes, selecting a stack-up before routing is an iterative process. While you establish an initial stack-up based on design requirements, adjustments may be needed during routing, especially if signal paths change. Collaboration with the manufacturer throughout the process ensures feasibility. |
| Do you have on your website material thicknesses so we can add that info to our stack-ups? | Our Stackup Designer tool provides detailed construction information, including the selected stack-up finished thickness, dielectric and copper base thickness, copper plating thickness, dielectric description, and material construction details. |
| We use KiCad to create a Standard 4 layer PCB board. Do you have a capabilities template that can be imported into KiCad? | Yes, we have templates available for KiCad. Please get in touch with our design team, and they will assist you with the import process. |
| Is your online DFM tool using Valor DFM + VPL Valor Part Libraries? | No, our online Better DFM tool does not use Valor for DFA. Currently, the tool is specifically for PCB DFM. |
| When you say parallel traces are a disaster, can you give an example? This is the first time I’ve heard this, but maybe that’s because I’m newer at this. But if I have four signals (two differential signals), do you mean routing them side by side is a problem? If you can clarify this, that would be great. | Straight, parallel high-speed traces might cause unwanted coupling and signal interference. To minimize these effects, we recommend routing critical and high-speed traces orthogonally. |
| Do you ever use the additive process for manufacturing PCB? Most seem to use subtractive, laminate, etch resist, acid, clean, etc. | We use addtive process for embedded trace technology with line width ≤ 2 mil. By eliminating the copper foil’s dendrite structure, we enhance signal speed and integrity. Additionally, embedding the traces in the dielectric removes adhesion challenges. While this method offers significant performance benefits, its cost makes it less practical for standard products, so we primarily use a subtractive process. |