Thanks to everyone who joined our forum and got a copy of Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications.
This thread is for you to ask your questions related to the ebook. Or just share your thoughts!
Where can we get a Rule #9 hat?
Is it possible to route differential Pairs through Vias when the board only has 2 Layers?
Could it work when done like shown in these screenshots?
The reason I ask, is that I use an Stm32F103C8T6 and want to add USB-C. The problem is that the D+ and D- Pins are interchanged.
The example of routing diff pairs on the top and bottom layers for a 4-layer board is very common. I recommend the 2 gnd layers,l then you can use shorting vias directly. They have about 1/2 the inductance as the two DC-blocking capacitors.
Hi Lucy,
I just registered on the Sierra Connect Site today. How do I get a copy of Bogatin’s Practical Guide to Transmission Line Design…?
Thank you.
Jim Hardiman
Hi Lucy, Ankith Here. I am a Hardware Design Engineer. My interests are in High Speed Design and System Design.
How do I get a copy of the Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications ?
Hi Lucy, I am Raul. I am a Staff HW Engineer who does both RF and Digital designs. My interests is continuing to broaden my technical acumen. Always trying to learn and grow my experiences in multiple engineering disciplines. I look forward to the opportunity in learning more from “Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications”.
Hi Jim, thanks for joining this forum!
I’ll email you the ebook soon.
Hi Raul, thanks for becoming a member of SierraConnect!
Hello Lucy, I also just registered and would like a copy of the transmission line design book.
Sending you the ebook now!
Hi all,
Ray Brubaker, EE in MD for decades looking to improve my PCB layout skills and “Bogatin’s Practical Guide…” sounds like a good addition.
Welcome Ray!
Just registered. I design/use burn-in boards for accelerated life tests conducted on high power CPU/GPU products that exhibit large current swings when running test patterns at relatively low speeds. I’m interested in limiting voltage over/undershoots while modulating stress voltages to keep the time average power within the burn-in hardware’s cooling capabilities. I look forward to reading Dr. Bogatin’s book.
Thanks for joining SierraConnect!
Hi Lucy,
I just registered today. I’m interested in signal and power integrity for high speed and high density PCB designs.
How can I get a copy of Eric Bogatin’s Practical Guide to Transmission Lines.
Thank you!
Hi Lucy,
Is it still possible to get a copy of the book?
Hi Michal, I’m so sorry but we’re all out!
