PCB for 230 VAC @ 8 A — Please Check My Understanding

Design and Layout
1

Hi everyone,

I’m designing a PCB that will switch 230 VAC at about 8 A using a relay. I’m still learning and would like to check if my understanding is correct:

  • Trace width:
    At 50 Hz (mains), skin effect is negligible, so I can size the copper like DC.
    For 8 A on 1 oz copper I think I need around 6–8 mm width or a large copper pour for about a 20 °C rise.
    (With 2 oz copper it seems about 3–4 mm width would be enough.)
    Does that sound right?

  • Creepage / clearance:
    When people say “give creepage,” does that basically mean leave a clear space between two traces or copper areas?
    I’ve seen posts saying 3 mm for 230 VAC — is that just a rule of thumb?
    How do you actually calculate the required creepage / clearance from the voltage?
    Does the current being carried also affect the creepage/clearance requirement, or is it only the voltage?
    And what if my board is tight and I can’t get the full 3 mm gap between traces — are there safe tricks like slots, cut-outs, extra solder mask, or coating that can be used to reduce the required distance?

  • High vs. low voltage separation:
    My relay coil is low-voltage, but its contacts carry 230 VAC. Should I completely separate the low-voltage side from the high-voltage side on the PCB? How do people normally lay out the relay footprint to keep it safe?

  • Solder mask:
    Some designers suggest putting solder mask over high-current traces, others leave it bare and tin it. Which is better for a mains 8 A trace?

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I calculated the trace width for 8 A with this tool — is that method valid for AC currents too?

Any help would be appreciated!

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Rough copper track widths are correct although I personally prefer to use 10C for temp rise. Always better to error on conservative side during design. Also note that inner planes can increase cooling effect so that can be of help.

Clearance is shortest distance across surface or through air. Creepage is shortest distance across surface so adding slots can increase creepage. Note that adding slots can create lower distance to opposite side copper so keep that in mind. You need to review UL60950-1 or similar for your product to determine proper creepage distances. It is based on RMS voltage, Mains isolation requirements, and pollution degree that is encountered in the application environment. Current is not a consideration for this item. You can place copper on inner layers as that tends to be pollution degree 1 but note that current capacity is less on inner layers than outside layers. Solder mask is NOT an electrical isolation method per regulatory groups but you can consider conformal coating which can also create a polution degree 1 condition if the coating is capable enough.

Moated isolation between coil circuit to contacts is generally prefered but it depends on your exact requirements as to whether you can just get by with creepage isolation gap alone.

I would not leave high current copper bare. Most users think that exposed copper can “pickup” solder during wave solder process and that extra solder will increase the current capacity. That is a false idea as solder is much higher resistance than copper so the only thing this will manage to create are more assembly based issues due to picking up the extra solder (most likely creating unwanted solder shorts). I will say that bare copper can cool better than solder mask covered copper…but you have to decide if that is enough benefit versus the assembly based risks.

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