We designed a PCB with a 2-port LAN connection with 100MHz speed. We struggle to get the LAN connection. It’s taking time to link up. We are not sure where to start this problem-solving.
Focus on one LAN port at a time to troubleshoot the issue. Set up a single connection and monitor the data flow. This approach helps identify problems more efficiently.
Regarding what frequency to use for calculator calculations, is there an advised process to calculate the effective frequency (the “knee frequency,” as some call it) of a signal given high-frequency components in rise/fall signal sections? e.g., a 100kHz square wave is a low-frequency signal, but the high-frequency components in the rising and falling seem like they could make it into a high-frequency signal; how can I know the “effective” frequency and how to treat it in my design?
Focus on analyzing the signal’s frequency components, particularly the rise time. It allows you to calculate the ‘knee frequency.’ This frequency gives you a clear idea of your signal’s high-frequency content, helping you appropriately handle it in your design and ensure proper performance.
How do PCBA potting/encapsulation material properties (DK / DF) affect your calculations?
The effect is similar to any material near the board. You calculate the effective dielectric constant (Dk) like you would for the solder mask, as the potting or encapsulation material will influence the signal propagation and impedance characteristics.
How many layers should we use for the stack-up of RF design?
The optimal stack-up for RF design typically ranges from 4 to 16 layers. It’s crucial to ensure that the stack-up is symmetric for optimal performance.
What’s different between TDR and Vector Network Analyzer?
TDR works in the time domain. It sends a fast pulse down a transmission line and measures reflections to determine impedance changes over time or distance.
Whereas, VNA operates in the frequency domain. It measures the amplitude and phase of signals over a range of frequencies to characterize the S-parameters of a device.
At what trace length does impedance matching become an issue?
Impedance matching becomes an issue when the trace length approaches critical length. A common rule of thumb is that impedance matching is necessary when the trace length exceeds one-tenth (λ/10) of the wavelength of the signal.
How should we design a transition between the RF track and the pad of an IC when there is a discontinuity? Let’s say the width of the RF track is 0.3mm, and the IC pad is 1mm wider.
It is best to use a continuous taper when designing a transition between an RF track and an IC pad with a width discontinuity (e.g., a 0.3mm RF track to a 1mm IC pad). This approach ensures optimal performance and a smooth transition. For example, we used a continuous taper to seamlessly fit everything and achieve the best performance in a project involving an RF IC with tiny pads connecting to an end-launch SMA.
What layer stack-up should be followed for better PCB strength?
Use coaxial cables to improve PCB strength. Ensure transitions are kept small and uniform for optimal performance. Semi-rigid coaxial cables are preferred for their durability and stability. Choose high-quality materials that offer better mechanical strength.
As I mentioned in the webinar on this, the algorithm will take the 2X thru coupon and use matrix math to split the coupon into two equivalent networks, input and output. After the coupon is measured, the DUT, lead in and lead out networks are measured in combination. The algorithm looks at any errors or differences between the ideal network and DUT with lead in/out and calculates the corrected network. Generally the 2X is slightly more accurate and robust with regard to causality and passivity.