I am researching the solder mask process in which mask is applied to the entire PCB surface, then imaged to create exposed pads and vias. In this case, is it common to have some left over mask within small diameter via holes or small nonplated holes due to not being able to completely force the mask out?
For finish hole diameter less than say 0.007" there is a possibility of the Solder mask not being completely cleared from inside the hole barrel. This will happen also when clearance is not provided in the Solder mask layers on both the sides.
If you need the holes to be clear of solder mask residues, we have process at Sierra for that.
Mask in the holes is an issue but can be controlled by the following:
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Not over-tacking the mask prior to exposure
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Using a Collimated light source like Laser or LED to better control exposure and registration
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A dedicated developer that can produce higher pressure to clean out the holes. Vertical developers work well for this application.
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A Dot stencil to help keep the mask out of the holes during screening. This should be considered a last resort as it adds time and typically requires hand screening.
Thank you both for your replies.
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There are limitations on removing solder mask from small holes, even if the hole/via areas are not exposed to UV light. This is because developer sprays have a limited ability to penetrate and enter those small holes. Attempting to increase the pressure of the sprays to overcome this limitation is not a viable solution because it can damage small features on the surface, such as fine width/short length dams.
In our shop, we clearly inform customers that we cannot guarantee the complete removal of solder mask ink for vias below 0.45 mm and we recommend keeping them closed by solder mask (expose the holes by UV light). If this did not happen, After developing, there will be some ink residues that are insufficient to protect the plated holes from oxidation but at the same time it sufficient to prevent the surface finish from adhering to the copper. The result is exposed copper and huge reliability issue.
In most cases, our recommendation is acceptable for customers because small hole with 0.45 mm or less serve as vias for conductivity. Applying a surface finish or closing them with a solder mask won’t make a difference.
However, if a customer insists on this, there’s only one solution I’m aware of: peelable solder mask. These can be used to cover the holes and continue the solder mask process. Once removed, the holes below them are exposed and cleared from the solder mask.
Are there vertical developing solutions for PCB? All what I see is horizontal conveyorized systems.
Do they any disadvantages comparing to the normal developers?
Vertical wet process equipment has been used in PCB manufacturing since the early 80’s. Vertical doesn’t handle thin material as well as horizontal equipment but the opposing spray bars can put more pressure on the panels which is an advantage especially when developing LPI.