# Should empty spaces on a 4-layer PCB be filled with ground? **URL:** \ **Category:** Design and Layout\ **Created:** [January 29, 2025, 2:31pm UTC](https://sierraconnect.protoexpress.com/t/should-empty-spaces-on-a-4-layer-pcb-be-filled-with-ground/2858 "2025-01-29T14:31:47Z")\ **Posts on this page:** 1\ **Showing post:** 2
**Author:** ![timothy.phillips](https://avatars.discourse-cdn.com/v4/letter/t/d78d45/32.png) [@timothy.phillips](https://sierraconnect.protoexpress.com/u/timothy.phillips)\ **Post date:** [January 29, 2025, 3:20pm UTC](https://sierraconnect.protoexpress.com/t/should-empty-spaces-on-a-4-layer-pcb-be-filled-with-ground/2858/2 "2025-01-29T15:20:08Z")
These other threads are worth reading… > [@Ground Pouring Strategy for 4-Layer PCB Design](https://sierraconnect.protoexpress.com/t/ground-pouring-strategy-for-4-layer-pcb-design/1480): > > In my 4-layer PCB design featuring the SIGNAL/GND/POWER/SIGNAL stackup, I’ve opted against pouring ground-connected copper on the top and bottom signal layers. Since, I’ve come across suggestion, that adding ground on these external signal layers, while having a dedicated ground plane layer, may offer little benefit and could potentially lead to EMI issues. However, I’m encountering a dilemma regarding my I2S traces operating at approximately 12 MHz and the SD card interface traces running at 5… > [@Ground and Power Plane Considerations](https://sierraconnect.protoexpress.com/t/ground-and-power-plane-considerations/1241): > > After extensively researching the topic why it’s a bad idea to separate ground or power in mixed analog and digital circuits. I’ve decided to implement a 4-layer PCB design with full GND and VCC planes inside, and the signal routing outside. However, I’m still uncertain about the necessity and effectiveness of including a VCC plane. While some sources suggest that having separate GND and VCC planes, with a dielectric in between, can act as a decoupling capacitor, others argue for using two grou… > [@Ground Pour Considerations](https://sierraconnect.protoexpress.com/t/ground-pour-considerations/1171): > > Hello, I’m working on a 4-layer PCB with the top and bottom layers designated for signals and the inner two layers for ground and power. I’m adding ground pours on both the top and bottom layers to streamline the routing, but I’m concerned about potential issues, especially impedance, as my project involves USB C 2.0. In general I prefer to pour open areas with GND or PWR copper. --- _[View the full topic](https://sierraconnect.protoexpress.com/t/should-empty-spaces-on-a-4-layer-pcb-be-filled-with-ground/2858)._