# Power Supply Board PCB Stackup

**URL:** https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775
**Category:** Schematic and layout
**Created:** [September 2, 2024, 12:09pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775 "2024-09-02T12:09:50Z")
**Posts on this page:** 18
**Page:** 1

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### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 2, 2024, 12:09pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/1 "2024-09-02T12:09:50Z")

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I am working on a Power Supply Board. I am wondering what consideration do I need to consider when it comes to power and ground planes and what trace width do I need to use for power signals. I am thinking of 4 layer Stackup.

Following is just an idea.

L1: Power  
L2: GND  
L3: GND  
L4: Routing of Control and Monitor Circuits.

If we go for standard 1.6 mm thick FR4 PCB than which thickness should I use between the layers.

In order to keep power ground coupling, there should be thinner dielectric between L1 (Power) and L2 (GND).

The L3 (GND) should be close to L4 (Routing).

This means there sill be a thick core between L2 (GND) and L3 (GND). What should be appropriate the thickness of the core ?

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### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 3, 2024, 7:36pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/2 "2024-09-03T19:36:55Z")

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> [@Sajal\_ee](#):
>
> This means there sill be a thick core between L2 (GND) and L3 (GND). What should be appropriate the thickness of the core ?

I guess there will be prepreg between L2 (GND) and L3 (GND) right ? not core.

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### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 3, 2024, 7:56pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/3 "2024-09-03T19:56:59Z")

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Do we have calculator for current measurement on traces ? In my case the voltage is 3.0 V and the current has to be up to 4.0 A. How much trace width should be fine ? and thickness of copper layer should be 35 um (1 oz) or it has to be more ?

I don’t think I should use 18 um (1/2 oz) for power plane.

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### Author: ![Hemnandan](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/hemnandan/32/41_2.png) [@Hemnandan](https://sierraconnect.protoexpress.com/u/Hemnandan)
#### Post date: [September 4, 2024, 2:37am UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/4 "2024-09-04T02:37:11Z")

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Hello

We have this calculator which can help you identify the trace width requirement. kindly check

[https://www.protoexpress.com/tools/trace-width-and-current-capacity-calculator/](https://www.protoexpress.com/tools/trace-width-and-current-capacity-calculator/)

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<div class="post-metadata">

### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 4, 2024, 9:54am UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/5 "2024-09-04T09:54:51Z")

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Thanks for your reply. I just have used the tool you mentioned. I notice that copper thickness 70 um (2 oz) is even better and have lower DC drop and lower power loss at max current.

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### Author: ![dilip](https://avatars.discourse-cdn.com/v4/letter/d/47e85d/32.png) [@dilip](https://sierraconnect.protoexpress.com/u/dilip)
#### Post date: [September 4, 2024, 3:21pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/6 "2024-09-04T15:21:27Z")

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For a 4 Layer board, L2 and L3 will generally have a core in between them. and depending on the finished thickness requirement. Dielectric thickness can be adjusted or constructed to reach the required target finished thickness.  
You can use our tool for Stackup construction

[https://www.protoexpress.com/tools/pcb-stackup-designer/](https://www.protoexpress.com/tools/pcb-stackup-designer/)

Regarding trace width, For 4A we need to follow proper trace width according to our layer thickness.

You can use our tool for trace width calculation  
[https://www.protoexpress.com/tools/trace-width-and-current-capacity-calculator/](https://www.protoexpress.com/tools/trace-width-and-current-capacity-calculator/)

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<div class="post-metadata">

### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 5, 2024, 10:06am UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/7 "2024-09-05T10:06:42Z")

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Thanks for your comment. I understand that there will be core between L2 and L3.

Kindly let me know of the following stackup is doable with normal price or it will be expansive due to thicker copper on external layers ?

Which minimum diameter of the via hole should be optimum ?

L1: copper thickness 70 um (2 oz) - power  
L2: copper thickness 35 um (1 oz) - ground  
L3: copper thickness 35 um (1 oz) - ground  
L4: copper thickness 70 um (2 oz) - power / signal routing

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<div class="post-metadata">

### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 5, 2024, 10:11am UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/8 "2024-09-05T10:11:14Z")

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I have seen a table in your books in which via drill holes for various copper layer thickness is shown and also with reference to IPC compliance. I am not able to find that document but it exist somewhere.

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### Author: ![eduardo.mateos](https://avatars.discourse-cdn.com/v4/letter/e/9fc29f/32.png) [@eduardo.mateos](https://sierraconnect.protoexpress.com/u/eduardo.mateos)
#### Post date: [September 5, 2024, 1:58pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/9 "2024-09-05T13:58:14Z")

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From Signal Integrity point of view the shorter the distance between the signal and the return path the better.

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<div class="post-metadata">

### Author: ![dilip](https://avatars.discourse-cdn.com/v4/letter/d/47e85d/32.png) [@dilip](https://sierraconnect.protoexpress.com/u/dilip)
#### Post date: [September 5, 2024, 2:53pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/10 "2024-09-05T14:53:57Z")

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Yes stackup is doable. Copper thickness doesn’t impact the drill diameter size. Drill size is depends on board thickness and aspect ratio.

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### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 5, 2024, 3:22pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/11 "2024-09-05T15:22:56Z")

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Thanks for your reply. I will chose the via drill in accordance to board thickness and aspect ratio.

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### Author: ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)
#### Post date: [September 5, 2024, 3:24pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/12 "2024-09-05T15:24:04Z")

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Could it be this table? (p76 of our DFM Handbook [https://www.protoexpress.com/pcb-design-guides/dfm-handbook/](https://www.protoexpress.com/pcb-design-guides/dfm-handbook/))

 ![image](https://global.discourse-cdn.com/sierraconnect/original/1X/140f48409c07c5c1355316990c2a37c54e863f6b.png)

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<div class="post-metadata">

### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 5, 2024, 3:27pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/13 "2024-09-05T15:27:16Z")

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Thanks for sharing this document. I will also go through the Handbooks. They are very useful and very comprehensive. Thanks again.

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<div class="post-metadata">

### Author: ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)
#### Post date: [September 5, 2024, 3:43pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/14 "2024-09-05T15:43:34Z")

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Cool. And in the meantime I’ve asked our designers to help answer your question about the availability of the IPC docs. Waiting for them to reply.

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### Author: ![JimJJewett](https://avatars.discourse-cdn.com/v4/letter/j/d78d45/32.png) [@JimJJewett](https://sierraconnect.protoexpress.com/u/JimJJewett)
#### Post date: [September 6, 2024, 2:25am UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/15 "2024-09-06T02:25:49Z")

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Is there any explanation (or known history) to explain why going from 35mil/1oz copper to 70mil/2oz makes such a tiny difference? (Less than half the specified additional thickness is actually required?)

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### Author: ![steve.carney](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/steve.carney/32/50_2.png) [@steve.carney](https://sierraconnect.protoexpress.com/u/steve.carney)
#### Post date: [September 6, 2024, 8:27pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/16 "2024-09-06T20:27:11Z")

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The starting or base copper on an outer layer is a piece of foil that comes in standard thicknesses as outlined on the left but finished plated thickness is something else. The important thing is to get at least .0008” of plating in the holes for Class 2 which don’t have any copper in them at all after drilling except for the layer interconnects. The standard process is to take the base thickness and add .0008” to get the final finished thickness – 1 oz copper @ .0014” thick + .0008” for the holes = .0026” on the surface. This is called a pattern plate where the holes and traces get plated at the same time. Unless something else is specified, the .0008” remains constant so thicker base foil is used to increase surface thickness. For fine line/HDI the base copper is usually kept to a minimum – down to 3um – to improve etching and the panels are plated up to the desired surface thickness. This process is referred to a semi-additive or modified semi-additive. The .0008” in the holes remains the same.

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<div class="post-metadata">

### Author: ![Sajal\_ee](https://avatars.discourse-cdn.com/v4/letter/s/d26b3c/32.png) [@Sajal\_ee](https://sierraconnect.protoexpress.com/u/Sajal_ee)
#### Post date: [September 11, 2024, 9:08am UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/17 "2024-09-11T09:08:27Z")

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Just one more question on cost.

What is the cost of having the following thicker copper layers compared to thinner 18 um (1/2 oz) ?

Is it very expansive with the following thick copper layers ?

L1: copper thickness 70 um (2 oz) - power / signal routing  
L2: copper thickness 35 um (1 oz) - ground  
L3: copper thickness 35 um (1 oz) - ground  
L4: copper thickness 70 um (2 oz) - power / signal routing

Which via aspect ratio is optimal for the above 1.6 mm board.

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<div class="post-metadata">

### Author: ![steve.carney](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/steve.carney/32/50_2.png) [@steve.carney](https://sierraconnect.protoexpress.com/u/steve.carney)
#### Post date: [September 11, 2024, 6:38pm UTC](https://sierraconnect.protoexpress.com/t/power-supply-board-pcb-stackup/1775/18 "2024-09-11T18:38:38Z")

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That’s a question for our sales but the copper foil is a pretty small part of the total build cost. Regarding aspect ratio, no real optimum but anything 12:1 or below if fine - lower is better.
