# Power Distribution in a 6-Layer PCB Design **URL:** \ **Category:** Signal and Power\ **Created:** [February 28, 2024, 10:24am UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167 "2024-02-28T10:24:45Z")\ **Posts on this page:** 8\ **Page:** 1
**Author:** ![Criniveran1988](https://avatars.discourse-cdn.com/v4/letter/c/ad7895/32.png) [@Criniveran1988](https://sierraconnect.protoexpress.com/u/Criniveran1988)\ **Post date:** [February 28, 2024, 10:24am UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167/1 "2024-02-28T10:24:46Z")
I’m designing a 6-layer PCB with multiple voltage requirements, including 3.3V, 5V, 12-14V, and 48V. I’m currently deciding on the stack-up configuration to get started with the tracing. I’m considering the best approach for handling the power distribution. Should I designate separate power planes for the different voltage levels? Is it feasible to allocate one power layer and multiple ground and signal layers and then route some of the power traces on one of the signal layers? ---
**Author:** ![allank](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/allank/32/259_2.png) [@allank](https://sierraconnect.protoexpress.com/u/allank)\ **Post date:** [February 28, 2024, 8:22pm UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167/2 "2024-02-28T20:22:20Z")
Yes, it’s feasible. Whether to go that way or not would depend on how much area each power net took up. I probably would not use 4 or more planes each with just one voltage. It’s a matter of need. ---
**Author:** ![Criniveran1988](https://avatars.discourse-cdn.com/v4/letter/c/ad7895/32.png) [@Criniveran1988](https://sierraconnect.protoexpress.com/u/Criniveran1988)\ **Post date:** [March 14, 2024, 7:12pm UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167/3 "2024-03-14T19:12:08Z")
Thanks, Allan! ---
**Author:** ![BerndKruger](https://avatars.discourse-cdn.com/v4/letter/b/a5b964/32.png) [@BerndKruger](https://sierraconnect.protoexpress.com/u/BerndKruger)\ **Post date:** [April 1, 2024, 2:17pm UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167/4 "2024-04-01T14:17:48Z")
Carefully analyze where each voltage level is truly required on the board. Often, not all voltages are needed everywhere. Consider if rearranging components slightly could allow you to create dedicated areas for each voltage level, minimizing unnecessary plane switching. Take into account the relative size (number of pins) of each voltage net. Larger nets are likely more evenly distributed across the board, making them good candidates for dedicated power planes or even using the ground plane as a reference. It’s generally recommended to separate higher voltage or power nets from low-level signal or control sections. This helps minimize noise coupling and heat dissipation concerns from affecting sensitive circuitry. By strategically planning your power planes based on localized needs, net size, and separation principles, you can achieve a cleaner, more efficient, and robust PCB design. ---
**Author:** ![myrtlee](https://avatars.discourse-cdn.com/v4/letter/m/3bc359/32.png) [@myrtlee](https://sierraconnect.protoexpress.com/u/myrtlee)\ **Post date:** [April 2, 2024, 1:41pm UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167/5 "2024-04-02T13:41:15Z")
When creating multiple voltage planes on a single layer, ensure there is ample spacing between them to prevent interference. Additionally, if needed, you can even incorporate mains AC on the same board, provided proper separation is maintained. ---
**Author:** ![Lieniner](https://avatars.discourse-cdn.com/v4/letter/l/e99b99/32.png) [@Lieniner](https://sierraconnect.protoexpress.com/u/Lieniner)\ **Post date:** [April 3, 2024, 1:53pm UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167/6 "2024-04-03T13:53:56Z")
Having a dedicated power plane for each voltage typically yields satisfactory outcomes without extensive planning. However, fitting four voltage planes along with ground and signal planes into six layers seems unlikely. If cost isn’t a concern, simply add more layers to allocate a separate plane for each voltage. ---
**Author:** ![nikh](https://avatars.discourse-cdn.com/v4/letter/n/6a8cbe/32.png) [@nikh](https://sierraconnect.protoexpress.com/u/nikh)\ **Post date:** [April 4, 2024, 2:25pm UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167/7 "2024-04-04T14:25:07Z")
If it is not feasible for adding more layers, then you can decrease the number of power planes needed by using some of these considerations: - Evaluate the necessity of individual voltage planes: If certain voltages, like 12-14V, serve solely as input for generating other voltages, they might not require a dedicated plane. Instead, a smaller plane or thicker track could suffice to route power to converters. - If certain voltages serve different areas of the PCB without overlapping, they can share the same layer. For instance, if a voltage is only used for a specific function or interface, it could potentially share a plane with another voltage, reducing the overall number of planes. - Consider using tracks for certain voltages: For low-current, stable voltage applications, utilizing tracks instead of dedicated planes might be feasible. ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [July 11, 2024, 8:34pm UTC](https://sierraconnect.protoexpress.com/t/power-distribution-in-a-6-layer-pcb-design/1167/8 "2024-07-11T20:34:39Z")
@SHALOM-ZIGDON asked me to post this: "The best PCB Layers design to be a solution for multi volts and to prevent Electromagnetic Interferences is : Layer#1 Top Higg current conductors Layer#2 GND full Plane Layer#3 Signal Horizontal Layer#4 Signal Vertical Layer#5 VCC full Plane no spliting. the most pins account voltage Layer #6 Bottom High current conductors All other voltages will be routed on layers 3 & 4."