# PCB Design rules **URL:** \ **Category:** Design and Layout\ **Tags:** signal-integrity, controlled-impedance, routing, via\ **Created:** [November 28, 2023, 7:44pm UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564 "2023-11-28T19:44:59Z")\ **Posts on this page:** 8\ **Page:** 1
**Author:** ![Brian.White](https://avatars.discourse-cdn.com/v4/letter/b/d2c977/32.png) [@Brian.White](https://sierraconnect.protoexpress.com/u/Brian.White)\ **Post date:** [November 28, 2023, 7:44pm UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564/1 "2023-11-28T19:44:59Z")
Where can I find a list of standard design rules for PCB layouts? ---
**Author:** ![atar.mittal](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/atar.mittal/32/49_2.png) [@atar.mittal](https://sierraconnect.protoexpress.com/u/atar.mittal)\ **Post date:** [November 28, 2023, 10:46pm UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564/2 "2023-11-28T22:46:33Z")
Based on your requirements, you can check our [blog](https://www.protoexpress.com/blog), [knowledge base](https://www.protoexpress.com/kb/) and [design guides](https://www.protoexpress.com/pcb-design-guides/). ---
**Author:** ![jhkim](https://avatars.discourse-cdn.com/v4/letter/j/f17d59/32.png) [@jhkim](https://sierraconnect.protoexpress.com/u/jhkim)\ **Post date:** [January 3, 2024, 12:40am UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564/3 "2024-01-03T00:40:01Z")
Hello. Dear, In the paper, there is a guide to applying the serpentine design to the angled part when it exceeds 15mm. (High-Speed PCB Design Guide, 2020) Can you tell me where the 15mm standard came from? If you reply, I think it will be a good point for developing simulation and design guides. ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 3, 2024, 12:40am UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564/4 "2024-01-03T00:40:26Z")
Are you referring to this part of the design guide? ![image](https://global.discourse-cdn.com/sierraconnect/original/1X/8b6cd77bbb419c5e997a94d8bc5a0ef2e10d569b.png) ---
**Author:** ![jhkim](https://avatars.discourse-cdn.com/v4/letter/j/f17d59/32.png) [@jhkim](https://sierraconnect.protoexpress.com/u/jhkim)\ **Post date:** [January 3, 2024, 1:56am UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564/5 "2024-01-03T01:56:46Z")
This is what I saw in the reference document. If I add one more thing, I’m curious about the background that led to 15mm. Is 15mm related to operating frequency? (F=1Ghz, RAMDA=15mm) So if it exceeds 15 mm, are you considering Si problems caused by skew, delay, jitter, etc.? ---
**Author:** ![atar.mittal](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/atar.mittal/32/49_2.png) [@atar.mittal](https://sierraconnect.protoexpress.com/u/atar.mittal)\ **Post date:** [January 3, 2024, 5:47am UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564/6 "2024-01-03T05:47:49Z")
I’m not sure where it came from but it is a reasonable number, in fact implying fix it within 1/2 inch or so of where it happened. ---
**Author:** ![jhkim](https://avatars.discourse-cdn.com/v4/letter/j/f17d59/32.png) [@jhkim](https://sierraconnect.protoexpress.com/u/jhkim)\ **Post date:** [January 3, 2024, 7:43am UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564/7 "2024-01-03T07:43:24Z")
thank you for your answer. within 0.5inch. ---
**Author:** ![steve.carney](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/steve.carney/32/50_2.png) [@steve.carney](https://sierraconnect.protoexpress.com/u/steve.carney)\ **Post date:** [January 8, 2024, 6:15pm UTC](https://sierraconnect.protoexpress.com/t/pcb-design-rules/564/8 "2024-01-08T18:15:59Z")
The 15 mm value in this document is not a standard but rather an example to demonstrate the concept of length matching. The actual values for length correction and bend-to-bend distance are determined on a case-by-case basis, depending on the design requirements. Typically, the compensation should take place close to the point where an impedance mismatch may occur.