# DFA Essentials a PCB Designer Should Know **URL:** \ **Category:** Webinars & Events\ **Tags:** dfa, webinar, pcba, assembly, pcb-assembly\ **Created:** [January 5, 2024, 10:07pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822 "2024-01-05T22:07:03Z")\ **Posts on this page:** 18\ **Page:** 1
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 5, 2024, 10:07pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/1 "2024-01-05T22:07:03Z")
> **DFA Essentials a PCB Designer Should Know** > > **Starts:** January 24, 2024, 10:00am (America/Los\_Angeles)\ > **Ends:** January 24, 2024, 11:00am (America/Los\_Angeles)\ > **Link:** ## **Agenda:** - Common design for assembly mistakes - Best practices for a flawless design file - Component placement strategies - Thermal management considerations - DFA tips for solder mask and silkscreen - DFA rules for comprehensive testing coverage - Panelization strategies for high-volume production - Sierra Circuits’ design tools: - BOM Compare - Better DFM **Date and time:** Wednesday January 24th, 2024 10:00 AM PT Ask your questions in this thread! ---
**Author:** ![rrix](https://avatars.discourse-cdn.com/v4/letter/r/dbc845/32.png) [@rrix](https://sierraconnect.protoexpress.com/u/rrix)\ **Post date:** [January 10, 2024, 7:42pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/2 "2024-01-10T19:42:19Z")
Questions: - Soldermask expansion;; 1:1 or pre-expanded. Pros/Cons. - Pastemask; 1:1 or windowed ---
**Author:** ![PoulomiG](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/poulomig/32/288_2.png) [@PoulomiG](https://sierraconnect.protoexpress.com/u/PoulomiG)\ **Post date:** [January 12, 2024, 1:58pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/3 "2024-01-12T13:58:53Z")
Thanks for your comment. Having a 1:1 solder mask expansion and paste mask ensures an optimum soldering process. It allows sufficient room for component placement, especially in HDI designs. ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:39pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/4 "2024-01-24T20:39:13Z")
Question asked by attendee during webinar: Components right below BGA? What about bypassing in today’s applications? ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:39pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/5 "2024-01-24T20:39:33Z")
Question asked by attendee during webinar: What’s the benefit of including centroid data when the pick and place has coordinates? ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:39pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/6 "2024-01-24T20:39:53Z")
Question asked by attendee during webinar: Do you prefer leaving soldermask 1:1 and letting you expand or pre-expanding it yourself? ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:40pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/7 "2024-01-24T20:40:50Z")
Question asked by attendee during webinar: I am designing a small PCB with 54% density, can I remove the reference designators and fiducials? ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:41pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/8 "2024-01-24T20:41:14Z")
Question asked by attendee during webinar: Any thoughts on sustainable PCB materials? ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:41pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/9 "2024-01-24T20:41:42Z")
Question asked by attendee during webinar: What is the recommended density of a 6 layer PCB? ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:42pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/10 "2024-01-24T20:42:12Z")
Question asked by attendee during webinar: Your BOM/DFM/DFA analysis tools seem useful. However, is there an option for how to do this with ITAR restricted designs? ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:43pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/11 "2024-01-24T20:43:17Z")
Reply by Sierra PCBA team: Centroid data is used in automation process for placing of components. ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:44pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/12 "2024-01-24T20:44:08Z")
Reply by Sierra PCBA team: The preference is to have mask larger than pad. A 10 mil pad would have a 16 mil clearance, 3 mils per side. ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:45pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/13 "2024-01-24T20:45:04Z")
Reply by Sierra PCBA team: Yes, it must however be a detailed assembly. dwg will be needed for QC purposes as well as submitting an ODB++ file or possibly the schematic if possible to determine polarity pins. ---
**Author:** ![lucy.sierracircuits](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/lucy.sierracircuits/32/8_2.png) [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Post date:** [January 24, 2024, 8:46pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/14 "2024-01-24T20:46:01Z")
Reply by Sierra PCBA team: Our [Better DFM](https://www.protoexpress.com/tools/pcb-dfm-tool/) system sits on a server at our facility which is in compliance with NIST and ITAR. ---
**Author:** ![phillipl](https://avatars.discourse-cdn.com/v4/letter/p/df705f/32.png) [@phillipl](https://sierraconnect.protoexpress.com/u/phillipl)\ **Post date:** [January 24, 2024, 9:29pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/15 "2024-01-24T21:29:53Z")
solder mask typically has 6 mils over the land size, a 10 mil pad would have a 16 mil mask clearance allowing 3 mils per side clearance. This will assist with registration and ensure no mask on pads. Webbing / solder dams should be at a minimum of 3 mils, any less and a potential risk of the mask peeling or flaking. We do incorporate mask defined openings ( mask encroaches on land) but in limited applications when webbing might be an issue and we want to retain the damn all in effort to minimize bridging and controlling the amount of solder being deposited in BGA applications specifically. ---
**Author:** ![phillipl](https://avatars.discourse-cdn.com/v4/letter/p/df705f/32.png) [@phillipl](https://sierraconnect.protoexpress.com/u/phillipl)\ **Post date:** [January 24, 2024, 9:33pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/16 "2024-01-24T21:33:18Z")
pick and place / centroid are the same, they are providing us the coordinates / rotation details for the automated pick and placement of parts. We are often provided data that has these details embedded in the cad files or they are provided as a separate documents that will be then be merged into the data that is provided. ---
**Author:** ![phillipl](https://avatars.discourse-cdn.com/v4/letter/p/df705f/32.png) [@phillipl](https://sierraconnect.protoexpress.com/u/phillipl)\ **Post date:** [January 24, 2024, 9:36pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/17 "2024-01-24T21:36:51Z")
let me clarify , its ok to remove the silkscreen but retaining the fiducials is not recommended as they can help improve the accuracy of part placement. if the silkscreen is removed, please ensure assembly retains a detailed assembly drawing showing pin indicators and polarity. An odb++ is always helpful in these cases. ---
**Author:** ![gopalm](https://avatars.discourse-cdn.com/v4/letter/g/4491bb/32.png) [@gopalm](https://sierraconnect.protoexpress.com/u/gopalm)\ **Post date:** [January 25, 2024, 1:44pm UTC](https://sierraconnect.protoexpress.com/t/dfa-essentials-a-pcb-designer-should-know/822/18 "2024-01-25T13:44:24Z")
Providing Solder mask 1:1 with copper pads saves time at CAM Stage, the clearances can be optimized to suit the imaging process followed.