# Considerations for Traces Near board Edges

**URL:** <https://sierraconnect.protoexpress.com/t/considerations-for-traces-near-board-edges/1205>\
**Category:** High Speed and Frequency\
**Created:** [March 12, 2024, 12:23pm UTC](https://sierraconnect.protoexpress.com/t/considerations-for-traces-near-board-edges/1205 "2024-03-12T12:23:18Z")\
**Posts on this page:** 4\
**Page:** 1

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**Author:** ![mark](https://avatars.discourse-cdn.com/v4/letter/m/e9c0ed/32.png) [@mark](https://sierraconnect.protoexpress.com/u/mark)\
**Post date:** [March 12, 2024, 12:23pm UTC](https://sierraconnect.protoexpress.com/t/considerations-for-traces-near-board-edges/1205/1 "2024-03-12T12:23:18Z")

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Is there a specific reason why traces shouldn’t be placed close to the edge of the PCB, whether it’s an electrical concern or a mechanical issue related to potential trace damage during board cutting?  
When routing high-speed traces near the edge, what should be the minimum copper-to-board edge clearance?  
Additionally, in terms of EMC concerns, would it be acceptable to have traces near the PCB edge if they are solely used for test connectors during testing and not during normal operations?

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**Author:** ![allank](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/allank/32/259_2.png) [@allank](https://sierraconnect.protoexpress.com/u/allank)\
**Post date:** [March 14, 2024, 6:18pm UTC](https://sierraconnect.protoexpress.com/t/considerations-for-traces-near-board-edges/1205/2 "2024-03-14T18:18:34Z")

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Not a specific reason in the sense of one major problem, but there are numerous potential problems that might be avoided. Occasionally (as you noted) the routing of the board can sometimes leave wisps of copper that could lead to a short. More common is that the planes have also been pulled back, leading to possible impedance or shielding problems. Those can both lead to unwanted radiation. or unwanted coupling to random, unwanted signals. Even when it’s covered by planes you could radiate from the edge via slot coupling. Lastly, the reason this rule first came about was that PCB’s were inserted into card cages and other holders, typically metal, and would then cause capacitive coupling or loading.

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**Author:** ![BerndKruger](https://avatars.discourse-cdn.com/v4/letter/b/a5b964/32.png) [@BerndKruger](https://sierraconnect.protoexpress.com/u/BerndKruger)\
**Post date:** [March 18, 2024, 12:55pm UTC](https://sierraconnect.protoexpress.com/t/considerations-for-traces-near-board-edges/1205/3 "2024-03-18T12:55:03Z")

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It’s generally advisable to keep traces away from the board edge due to the following potential issues:

- Exposed copper can attract solder during the wave soldering process, causing unintended shorts during assembly.
- Exposed copper at the board edge might come into contact with the product chassis, posing a risk of shorting to the ground or even electrical shock.
- Copper traces can tear during routing, leaving strands that might short to adjacent layers.

Therefore, it is both a mechanical and electrical issue.

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**Author:** ![JimJJewett](https://avatars.discourse-cdn.com/v4/letter/j/d78d45/32.png) [@JimJJewett](https://sierraconnect.protoexpress.com/u/JimJJewett)\
**Post date:** [March 20, 2024, 3:52pm UTC](https://sierraconnect.protoexpress.com/t/considerations-for-traces-near-board-edges/1205/4 "2024-03-20T15:52:32Z")

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So if you wouldn’t be doing additional processing to cut/size the board, and the trace were ground, or at least a rare control signal, would it be safe? Or is there just too much risk of a sliver getting knocked off and moving to where it could create a short?