# Ask Me Anything with Daniel Beeker

**URL:** <https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181>\
**Category:** Ask Me Anything\
**Tags:** emc, emi\
**Created:** [October 2, 2023, 7:08pm UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181 "2023-10-02T19:08:10Z")\
**Posts on this page:** 8\
**Page:** 2

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**Author:** ![daniel.beeker](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/daniel.beeker/32/51_2.png) [@daniel.beeker](https://sierraconnect.protoexpress.com/u/daniel.beeker)\
**Post date:** [October 9, 2023, 9:23pm UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181/21 "2023-10-09T21:23:07Z")

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I would route them together from the resistor to the sensing circuit. Where they cross over the boundary from the isolated power domain into the sense domain, I would use a capacitor as the bridge (placed between the signal traces.) We do this all the time in battery management between the high voltage and the low voltage, control domain.

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**Author:** ![atar.mittal](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/atar.mittal/32/49_2.png) [@atar.mittal](https://sierraconnect.protoexpress.com/u/atar.mittal)\
**Post date:** [October 10, 2023, 1:46am UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181/22 "2023-10-10T01:46:18Z")

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Thank you Dan!

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**Author:** ![Pooja\_Mitra](https://avatars.discourse-cdn.com/v4/letter/p/ce73a5/32.png) [@Pooja\_Mitra](https://sierraconnect.protoexpress.com/u/Pooja_Mitra)\
**Post date:** [October 10, 2023, 4:41am UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181/23 "2023-10-10T04:41:01Z")

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Thank you Dan.

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**Author:** ![PoulomiG](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/poulomig/32/288_2.png) [@PoulomiG](https://sierraconnect.protoexpress.com/u/PoulomiG)\
**Post date:** [October 10, 2023, 4:50am UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181/24 "2023-10-10T04:50:51Z")

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Thanks a lot, Dan!

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**Author:** ![rahuls](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/rahuls/32/9_2.png) [@rahuls](https://sierraconnect.protoexpress.com/u/rahuls)\
**Post date:** [October 10, 2023, 1:21pm UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181/25 "2023-10-10T13:21:55Z")

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Thank you, Dan!

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**Author:** ![steve.carney](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/steve.carney/32/50_2.png) [@steve.carney](https://sierraconnect.protoexpress.com/u/steve.carney)\
**Post date:** [October 10, 2023, 6:52pm UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181/26 "2023-10-10T18:52:26Z")

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Thanks a lot Dan.

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**Author:** ![PoulomiG](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/poulomig/32/288_2.png) [@PoulomiG](https://sierraconnect.protoexpress.com/u/PoulomiG)\
**Post date:** [November 3, 2023, 1:37pm UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181/27 "2023-11-03T13:37:50Z")

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@daniel.beeker Do traces with right-angle bends affect signal integrity and circuit functionality?

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<div class="post-metadata">

**Author:** ![daniel.beeker](https://sea2.discourse-cdn.com/sierraconnect/user_avatar/sierraconnect.protoexpress.com/daniel.beeker/32/51_2.png) [@daniel.beeker](https://sierraconnect.protoexpress.com/u/daniel.beeker)\
**Post date:** [November 3, 2023, 2:48pm UTC](https://sierraconnect.protoexpress.com/t/ask-me-anything-with-daniel-beeker/181/28 "2023-11-03T14:48:32Z")

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This question often comes up. The change in trace width during the right angle copper portion does create a discontinuity. However, it is so small in length that it is lumped for any frequency of signal that you will find on an FR4 PCB. Unless you are working with signals that switch in the terahertz range, these shapes are invisible.

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