# Latest **URL:** https://sierraconnect.protoexpress.com/latest.md [Latest](https://sierraconnect.protoexpress.com/latest.md) · [Categories](https://sierraconnect.protoexpress.com/categories.md) · [Tags](https://sierraconnect.protoexpress.com/tags.md) --- ## [Welcome to SierraConnect! 👋](https://sierraconnect.protoexpress.com/t/welcome-to-sierraconnect/5)
**Author:** [@system](https://sierraconnect.protoexpress.com/u/system)\ **Replies:** 61\ **Last updated:** [January 2, 2024, 10:06pm UTC](https://sierraconnect.protoexpress.com/t/welcome-to-sierraconnect/5 "2024-01-02T22:06:06Z")
We are so glad you joined us. SierraConnect Review the terms of service for the SierraConnect PCB forum. Learn about user responsibilities, privacy policies, and the legal guidelines for using our platform. Here are … --- ## [SPOT THE FLAW: This trace might be asked to do more than it can handle](https://sierraconnect.protoexpress.com/t/spot-the-flaw-this-trace-might-be-asked-to-do-more-than-it-can-handle/4513)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 1\ **Last updated:** [September 25, 2026, 7:16pm UTC](https://sierraconnect.protoexpress.com/t/spot-the-flaw-this-trace-might-be-asked-to-do-more-than-it-can-handle/4513 "2026-09-25T19:16:31Z")
Answer on Friday… --- ## [MEMBER GIVEAWAY 🎉](https://sierraconnect.protoexpress.com/t/member-giveaway/4482)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 7\ **Last updated:** [September 25, 2026, 7:11pm UTC](https://sierraconnect.protoexpress.com/t/member-giveaway/4482 "2026-09-25T19:11:27Z")
I’d like to personally thank our top 5 members @JimJJewett, @timothy.phillips, @myrtlee, @will and @BerndKruger for their participation on our forum. DM me your address, y’all, I’ll send you a cool thank you gift from S… --- ## [Feasibility of SMD-over-through-hole assembly](https://sierraconnect.protoexpress.com/t/feasibility-of-smd-over-through-hole-assembly/4514)
**Author:** [@gigio](https://sierraconnect.protoexpress.com/u/gigio)\ **Replies:** 1\ **Last updated:** [September 25, 2026, 1:41pm UTC](https://sierraconnect.protoexpress.com/t/feasibility-of-smd-over-through-hole-assembly/4514 "2026-09-25T13:41:35Z")
Is it practical to solder an SMD component directly over through-holes if the pad pitch matches? What are the usual methods for preventing solder from wicking into the holes and ensuring a reliable solder joint? --- ## [How to Achieve Electromagnetic Compliance in Your PCBs](https://sierraconnect.protoexpress.com/t/how-to-achieve-electromagnetic-compliance-in-your-pcbs/4512)
**Author:** [@Pooja\_Mitra](https://sierraconnect.protoexpress.com/u/Pooja_Mitra)\ **Replies:** 0\ **Last updated:** [September 23, 2026, 3:53pm UTC](https://sierraconnect.protoexpress.com/t/how-to-achieve-electromagnetic-compliance-in-your-pcbs/4512 "2026-09-23T15:53:28Z")
Originally published at: https://www.protoexpress.com/blog/electromagnetic-compliance-in-pcbs/ Designing a PCB for electromagnetic compliance starts with identifying and controlling the sources of unwanted EM energy.… --- ## [How do you evaluate the acids, solids, and solvents in a soldering flux?](https://sierraconnect.protoexpress.com/t/how-do-you-evaluate-the-acids-solids-and-solvents-in-a-soldering-flux/4510)
**Author:** [@Zaibahmed\_Mannur](https://sierraconnect.protoexpress.com/u/Zaibahmed_Mannur)\ **Replies:** 3\ **Last updated:** [September 23, 2026, 1:48pm UTC](https://sierraconnect.protoexpress.com/t/how-do-you-evaluate-the-acids-solids-and-solvents-in-a-soldering-flux/4510 "2026-09-23T13:48:13Z")
Last week, we discussed How do you choose the right soldering flux for PCB assembly. This post continues that discussion by looking at the three main components of flux that are acids, solids, and solvents, and how each … --- ## [DFA mistakes we keep seeing](https://sierraconnect.protoexpress.com/t/dfa-mistakes-we-keep-seeing/4509)
**Author:** [@atar.mittal](https://sierraconnect.protoexpress.com/u/atar.mittal)\ **Replies:** 0\ **Last updated:** [September 22, 2026, 4:21pm UTC](https://sierraconnect.protoexpress.com/t/dfa-mistakes-we-keep-seeing/4509 "2026-09-22T16:21:47Z")
Our PCB house has seen plenty of boards that were perfectly manufacturable… until it was time to assemble them. A few DFA mistakes that cause more trouble than they should: Components placed too close to the board edg… --- ## [Clear potting compound for an outdoor sensor board](https://sierraconnect.protoexpress.com/t/clear-potting-compound-for-an-outdoor-sensor-board/4496)
**Author:** [@mark](https://sierraconnect.protoexpress.com/u/mark)\ **Replies:** 3\ **Last updated:** [September 22, 2026, 2:06pm UTC](https://sierraconnect.protoexpress.com/t/clear-potting-compound-for-an-outdoor-sensor-board/4496 "2026-09-22T14:06:24Z")
I’m working on a small sensor board (STM32 + analog ICs) for an unsealed outdoor enclosure. I need clear potting for moisture and vibration protection while keeping LEDs visible for inspection. Given typical outdoor temp… --- ## [POLL: What causes the most avoidable respins?](https://sierraconnect.protoexpress.com/t/poll-what-causes-the-most-avoidable-respins/4506)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [September 21, 2026, 5:15pm UTC](https://sierraconnect.protoexpress.com/t/poll-what-causes-the-most-avoidable-respins/4506 "2026-09-21T17:15:17Z")
poll --- ## [SPOT THE FLAW: Your test engineer might have a complaint](https://sierraconnect.protoexpress.com/t/spot-the-flaw-your-test-engineer-might-have-a-complaint/4491)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 1\ **Last updated:** [September 18, 2026, 9:45pm UTC](https://sierraconnect.protoexpress.com/t/spot-the-flaw-your-test-engineer-might-have-a-complaint/4491 "2026-09-18T21:45:55Z")
Answer on Friday… --- ## [You know the PCB release is in trouble when…](https://sierraconnect.protoexpress.com/t/you-know-the-pcb-release-is-in-trouble-when/4502)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [September 18, 2026, 3:32pm UTC](https://sierraconnect.protoexpress.com/t/you-know-the-pcb-release-is-in-trouble-when/4502 "2026-09-18T15:32:44Z")
…someone says, ‘It passed DRC, so we should be good.’ --- ## [Webinar: Arcs and Sparks - My ESD Journey](https://sierraconnect.protoexpress.com/t/webinar-arcs-and-sparks-my-esd-journey/4325)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 3\ **Last updated:** [September 17, 2026, 6:17pm UTC](https://sierraconnect.protoexpress.com/t/webinar-arcs-and-sparks-my-esd-journey/4325 "2026-09-17T18:17:08Z")
Thanks for your interest in our webinar with @ken! Missed the webinar? Click the link below to access the slides and recording. 📅 September 9, 2026 9:00 AM → September 9, 2026 10:00 AM (America/Los\_Angeles) · https://w… --- ## [Webinar: Ultra-HDI PCB Design and Manufacturing](https://sierraconnect.protoexpress.com/t/webinar-ultra-hdi-pcb-design-and-manufacturing/4397)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 1\ **Last updated:** [September 17, 2026, 4:07pm UTC](https://sierraconnect.protoexpress.com/t/webinar-ultra-hdi-pcb-design-and-manufacturing/4397 "2026-09-17T16:07:36Z")
Thanks for you interest in our webinar on uHDI. Missed the webinar? Click the link below to access the slides and recording. 📅 September 16, 2026 9:00 AM → September 16, 2026 10:00 AM (America/Los\_Angeles) · https://ww… --- ## [What manufacturing topic should Sierra explain more clearly?](https://sierraconnect.protoexpress.com/t/what-manufacturing-topic-should-sierra-explain-more-clearly/4495)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [September 17, 2026, 3:13pm UTC](https://sierraconnect.protoexpress.com/t/what-manufacturing-topic-should-sierra-explain-more-clearly/4495 "2026-09-17T15:13:44Z")
PCB manufacturing has a lot of rules, tolerances, and processes that designers are expected to understand but they’re not always explained very well. Soooo dear designers: what’s one manufacturing topic you wish Sierra … --- ## [How a Multi-Board LED Prototype was Reverse-Engineered into a Single PCB](https://sierraconnect.protoexpress.com/t/how-a-multi-board-led-prototype-was-reverse-engineered-into-a-single-pcb/4494)
**Author:** [@Pooja\_Mitra](https://sierraconnect.protoexpress.com/u/Pooja_Mitra)\ **Replies:** 0\ **Last updated:** [September 17, 2026, 2:07pm UTC](https://sierraconnect.protoexpress.com/t/how-a-multi-board-led-prototype-was-reverse-engineered-into-a-single-pcb/4494 "2026-09-17T14:07:15Z")
Originally published at: How a Multi-Board LED was Reverse-Engineered | Sierra Circuits Sierra Circuits reverse-engineered an LED controller prototype with multiple off-the-shelf modules and consolidated the design i… --- ## [How do you choose the right soldering flux for PCB assembly?](https://sierraconnect.protoexpress.com/t/how-do-you-choose-the-right-soldering-flux-for-pcb-assembly/4490)
**Author:** [@Zaibahmed\_Mannur](https://sierraconnect.protoexpress.com/u/Zaibahmed_Mannur)\ **Replies:** 2\ **Last updated:** [September 16, 2026, 2:11pm UTC](https://sierraconnect.protoexpress.com/t/how-do-you-choose-the-right-soldering-flux-for-pcb-assembly/4490 "2026-09-16T14:11:52Z")
Flux plays a critical role in solder wetting by removing oxides and preventing reoxidation before solder is applied. The challenge is choosing enough flux activity to achieve reliable wetting without introducing unnecess… --- ## [Debate: Should the stack-up be finalized before placement?](https://sierraconnect.protoexpress.com/t/debate-should-the-stack-up-be-finalized-before-placement/4486)
**Author:** [@atar.mittal](https://sierraconnect.protoexpress.com/u/atar.mittal)\ **Replies:** 0\ **Last updated:** [September 15, 2026, 5:34pm UTC](https://sierraconnect.protoexpress.com/t/debate-should-the-stack-up-be-finalized-before-placement/4486 "2026-09-15T17:34:06Z")
Alright, I’m probably going to make some people angry with this one. I think your stack-up should be figured out BEFORE you start placement. Not “we have a general idea.” Not “we’ll figure it out once we start routing.… --- ## [Filling unused signal-layer space: GND pour or copper thieving?](https://sierraconnect.protoexpress.com/t/filling-unused-signal-layer-space-gnd-pour-or-copper-thieving/4448)
**Author:** [@Olivia](https://sierraconnect.protoexpress.com/u/Olivia)\ **Replies:** 3\ **Last updated:** [September 15, 2026, 2:52pm UTC](https://sierraconnect.protoexpress.com/t/filling-unused-signal-layer-space-gnd-pour-or-copper-thieving/4448 "2026-09-15T14:52:33Z")
I’m trying to understand the best practice for filling unused areas on signal layers. I’ve seen conflicting guidance: some recommend leaving copper thieving to the fabricator for copper balance, while others use GND pour… --- ## [SPOT THE FLAW: This design may look fine before the heat is on](https://sierraconnect.protoexpress.com/t/spot-the-flaw-this-design-may-look-fine-before-the-heat-is-on/4468)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 1\ **Last updated:** [September 11, 2026, 7:51pm UTC](https://sierraconnect.protoexpress.com/t/spot-the-flaw-this-design-may-look-fine-before-the-heat-is-on/4468 "2026-09-11T19:51:56Z")
Answer on Friday… --- ## [Ask the instructor: Stack-up questions](https://sierraconnect.protoexpress.com/t/ask-the-instructor-stack-up-questions/4481)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 1\ **Last updated:** [September 11, 2026, 3:52pm UTC](https://sierraconnect.protoexpress.com/t/ask-the-instructor-stack-up-questions/4481 "2026-09-11T15:52:32Z")
Got a PCB stack-up question you’ve been meaning to ask? Drop it in below! Layer count, materials, impedance, copper thickness, HDI, signal integrity, or a stack-up you’re currently struggling with… ask away. I’ll show… --- ## [What question were you afraid to ask when you started?](https://sierraconnect.protoexpress.com/t/what-question-were-you-afraid-to-ask-when-you-started/4479)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [September 10, 2026, 4:17pm UTC](https://sierraconnect.protoexpress.com/t/what-question-were-you-afraid-to-ask-when-you-started/4479 "2026-09-10T16:17:06Z")
When you first started working with PCBs, what’s one question you were afraid to ask because you thought you should already know the answer? No judgment here, chances are, someone else is wondering the exact same thing. … --- ## [How do you design a PCB for reliable wave soldering?](https://sierraconnect.protoexpress.com/t/how-do-you-design-a-pcb-for-reliable-wave-soldering/4463)
**Author:** [@Pooja\_Mitra](https://sierraconnect.protoexpress.com/u/Pooja_Mitra)\ **Replies:** 3\ **Last updated:** [September 9, 2026, 2:18pm UTC](https://sierraconnect.protoexpress.com/t/how-do-you-design-a-pcb-for-reliable-wave-soldering/4463 "2026-09-09T14:18:32Z")
Wave soldering is commonly used for through-hole and hybrid PCB assemblies, but getting consistent solder coverage depends on more than the soldering equipment. PCB layout, component orientation, exposed metal area, and … --- ## [PCB Assembly Process](https://sierraconnect.protoexpress.com/t/pcb-assembly-process/3058)
**Author:** [@Mohamed\_Faheemuddin](https://sierraconnect.protoexpress.com/u/Mohamed_Faheemuddin)\ **Replies:** 1\ **Last updated:** [September 8, 2026, 4:34pm UTC](https://sierraconnect.protoexpress.com/t/pcb-assembly-process/3058 "2026-09-08T16:34:54Z")
PCB assemby is the process of mounting electronic components on a bare circuit board. Below is the step-by-step procedure: 1. DFA (design for assembly) analysis It is the first stage of PCBA. During this phase, DFA … --- ## [6 PCB Thermal Management Guidelines for Designers](https://sierraconnect.protoexpress.com/t/6-pcb-thermal-management-guidelines-for-designers/4444)
**Author:** [@Mohamed\_Faheemuddin](https://sierraconnect.protoexpress.com/u/Mohamed_Faheemuddin)\ **Replies:** 0\ **Last updated:** [September 8, 2026, 1:08pm UTC](https://sierraconnect.protoexpress.com/t/6-pcb-thermal-management-guidelines-for-designers/4444 "2026-09-08T13:08:59Z")
Thermal management in PCBs is a crucial design aspect, especially in high-power designs where components and conductors generate significant heat during operation. Excessive temperature can increase electrical resista… --- ## [SPOT THE FLAW: Sometimes, the problem is the neighborhood](https://sierraconnect.protoexpress.com/t/spot-the-flaw-sometimes-the-problem-is-the-neighborhood/4434)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 1\ **Last updated:** [September 4, 2026, 6:26pm UTC](https://sierraconnect.protoexpress.com/t/spot-the-flaw-sometimes-the-problem-is-the-neighborhood/4434 "2026-09-04T18:26:05Z")
Answer on Friday… --- ## [Sierrathon 2026](https://sierraconnect.protoexpress.com/t/sierrathon-2026/4425)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 3\ **Last updated:** [September 4, 2026, 4:33pm UTC](https://sierraconnect.protoexpress.com/t/sierrathon-2026/4425 "2026-09-04T16:33:05Z")
Put your PCB skills to the test! Sierrathon is not your average design competition, it’s a high-energy, fast-paced challenge where engineering students tackle real-world PCB design problems. Over the course of one day, t… --- ## [How do wave-solderable smd packages survive direct wave contact](https://sierraconnect.protoexpress.com/t/how-do-wave-solderable-smd-packages-survive-direct-wave-contact/4327)
**Author:** [@mark](https://sierraconnect.protoexpress.com/u/mark)\ **Replies:** 4\ **Last updated:** [September 4, 2026, 3:19pm UTC](https://sierraconnect.protoexpress.com/t/how-do-wave-solderable-smd-packages-survive-direct-wave-contact/4327 "2026-09-04T15:19:55Z")
I know wave soldering is primarily used for through-hole components, but I’ve also read that certain SMD components can be wave soldered on mixed-technology boards. What I’m trying to understand is what actually comes i… --- ## [Webinar: Practical EMI Reduction Techniques Every PCB Designer Should Know](https://sierraconnect.protoexpress.com/t/webinar-practical-emi-reduction-techniques-every-pcb-designer-should-know/4326)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 1\ **Last updated:** [September 3, 2026, 5:22pm UTC](https://sierraconnect.protoexpress.com/t/webinar-practical-emi-reduction-techniques-every-pcb-designer-should-know/4326 "2026-09-03T17:22:16Z")
Thanks for your interest in our webinar on EMI reduction with special Q&A by @karen.burnham! Missed the webinar? Click the link below to access the recording and slides. 📅 August 26, 2026 9:00 AM → August 26, 2026 10:0… --- ## [Replacing power trace with a copper pour in dense layouts](https://sierraconnect.protoexpress.com/t/replacing-power-trace-with-a-copper-pour-in-dense-layouts/4382)
**Author:** [@anderson](https://sierraconnect.protoexpress.com/u/anderson)\ **Replies:** 5\ **Last updated:** [September 3, 2026, 4:55pm UTC](https://sierraconnect.protoexpress.com/t/replacing-power-trace-with-a-copper-pour-in-dense-layouts/4382 "2026-09-03T16:55:55Z")
I need to route a power rail carrying a current of 5 A with a temp rise of 20oc and 1 oz copper. Based on standard trace width calculators, this requires roughly a 95-mil equivalent trace width. But the component density… --- ## [PCB Glossary: Thermal cycling](https://sierraconnect.protoexpress.com/t/pcb-glossary-thermal-cycling/4438)
**Author:** [@Mohamed\_Faheemuddin](https://sierraconnect.protoexpress.com/u/Mohamed_Faheemuddin)\ **Replies:** 0\ **Last updated:** [September 3, 2026, 11:04am UTC](https://sierraconnect.protoexpress.com/t/pcb-glossary-thermal-cycling/4438 "2026-09-03T11:04:54Z")
PCB thermal cycling is a type of circuit board test that exposes a board to repeated predetermined high and low temperatures. It evaluates how well the circuit board materials, interconnections, and components withstand … [Next page](https://sierraconnect.protoexpress.com/latest.md?page=1)