# Signal integrity **URL:** https://sierraconnect.protoexpress.com/c/signal-and-power/signal-integrity/19.md [Latest](https://sierraconnect.protoexpress.com/latest.md) · [Categories](https://sierraconnect.protoexpress.com/categories.md) · [Tags](https://sierraconnect.protoexpress.com/tags.md) --- ## [About the Signal integrity category](https://sierraconnect.protoexpress.com/t/about-the-signal-integrity-category/27)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [September 5, 2023, 10:21pm UTC](https://sierraconnect.protoexpress.com/t/about-the-signal-integrity-category/27 "2023-09-05T22:21:51Z")
The Signal Integrity category on SierraConnect is dedicated to ensuring high-quality signal performance in PCB designs. This category explores techniques and strategies for maintaining signal clarity and minimizing inter… --- ## [Typical Signal Integrity Issues PCB Designers Should Watch Out For](https://sierraconnect.protoexpress.com/t/typical-signal-integrity-issues-pcb-designers-should-watch-out-for/4378)
**Author:** [@Mohamed\_Faheemuddin](https://sierraconnect.protoexpress.com/u/Mohamed_Faheemuddin)\ **Replies:** 0\ **Last updated:** [August 17, 2026, 1:41pm UTC](https://sierraconnect.protoexpress.com/t/typical-signal-integrity-issues-pcb-designers-should-watch-out-for/4378 "2026-08-17T13:41:07Z")
As signal rise times become faster and data rates increase, PCB traces can no longer be treated as simple electrical connections. Trace impedance, return current paths, coupling between adjacent conductors, and power … --- ## [What is Signal Propagation Delay in PCBs?](https://sierraconnect.protoexpress.com/t/what-is-signal-propagation-delay-in-pcbs/3836)
**Author:** [@Mohamed\_Faheemuddin](https://sierraconnect.protoexpress.com/u/Mohamed_Faheemuddin)\ **Replies:** 0\ **Last updated:** [January 30, 2026, 5:05am UTC](https://sierraconnect.protoexpress.com/t/what-is-signal-propagation-delay-in-pcbs/3836 "2026-01-30T05:05:47Z")
Originally published at: https://www.protoexpress.com/blog/signal-propagation-delay-pcb/ Delay is frustrating, whether in our daily lives or the devices we use for our convenience. Propagation delay/time delay inhibi… --- ## [7 Tips and PCB Design Guidelines for EMI and EMC](https://sierraconnect.protoexpress.com/t/7-tips-and-pcb-design-guidelines-for-emi-and-emc/3780)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [January 6, 2026, 8:58am UTC](https://sierraconnect.protoexpress.com/t/7-tips-and-pcb-design-guidelines-for-emi-and-emc/3780 "2026-01-06T08:58:55Z")
Originally published at: https://www.protoexpress.com/blog/7-pcb-design-tips-solve-emi-emc-issues/ Electromagnetic interference (EMI) is associated with every electronic device we use nowadays. If you turn on your ra… --- ## [Analyzing Eye Diagrams for Signal Integrity in High-Speed PCBs](https://sierraconnect.protoexpress.com/t/analyzing-eye-diagrams-for-signal-integrity-in-high-speed-pcbs/3111)
**Author:** [@Pooja\_Mitra](https://sierraconnect.protoexpress.com/u/Pooja_Mitra)\ **Replies:** 0\ **Last updated:** [April 22, 2025, 4:24pm UTC](https://sierraconnect.protoexpress.com/t/analyzing-eye-diagrams-for-signal-integrity-in-high-speed-pcbs/3111 "2025-04-22T16:24:38Z")
Originally published at: https://www.protoexpress.com/blog/analyzing-eye-diagrams-for-signal-integrity-high-speed-pcbs/ An eye diagram is one of the most effective methods for analyzing the signal integrity of your P… --- ## [Techniques to Measure and Avoid Jitter in PCBs](https://sierraconnect.protoexpress.com/t/techniques-to-measure-and-avoid-jitter-in-pcbs/2996)
**Author:** [@PoulomiG](https://sierraconnect.protoexpress.com/u/PoulomiG)\ **Replies:** 0\ **Last updated:** [March 17, 2025, 11:38am UTC](https://sierraconnect.protoexpress.com/t/techniques-to-measure-and-avoid-jitter-in-pcbs/2996 "2025-03-17T11:38:19Z")
Originally published at: https://www.protoexpress.com/blog/techniques-to-measure-and-avoid-jitter-in-pcbs/ A signal’s deflection from its ideal rising and falling edges is called a jitter in PCB. The jitter in clock … --- ## [OPEN DISCUSSION: How do you optimize PCB stack-up for signal integrity, especially in high-speed or RF designs?](https://sierraconnect.protoexpress.com/t/open-discussion-how-do-you-optimize-pcb-stack-up-for-signal-integrity-especially-in-high-speed-or-rf-designs/2952)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 4\ **Last updated:** [March 4, 2025, 5:12pm UTC](https://sierraconnect.protoexpress.com/t/open-discussion-how-do-you-optimize-pcb-stack-up-for-signal-integrity-especially-in-high-speed-or-rf-designs/2952 "2025-03-04T17:12:00Z")
Stack-up plays a critical role in managing impedance, minimizing crosstalk, and reducing signal loss. Do you prioritize layer arrangement, dielectric selection, or reference plane placement? Share your strategies, challe… --- ## [5 PCB Trace Termination Techniques to Reduce Signal Reflections](https://sierraconnect.protoexpress.com/t/5-pcb-trace-termination-techniques-to-reduce-signal-reflections/1358)
**Author:** [@PoulomiG](https://sierraconnect.protoexpress.com/u/PoulomiG)\ **Replies:** 2\ **Last updated:** [April 25, 2024, 4:01am UTC](https://sierraconnect.protoexpress.com/t/5-pcb-trace-termination-techniques-to-reduce-signal-reflections/1358 "2024-04-25T04:01:13Z")
Originally published at: https://www.protoexpress.com/blog/pcb-trace-termination-techniques-to-reduce-signal-reflections/ PCB trace termination is crucial for maintaining signal integrity in your designs. Unterminate… --- ## [Samtec Signal Integrity Handbook](https://sierraconnect.protoexpress.com/t/samtec-signal-integrity-handbook/888)
**Author:** [@ConnectorGuy](https://sierraconnect.protoexpress.com/u/ConnectorGuy)\ **Replies:** 5\ **Last updated:** [January 18, 2024, 7:29am UTC](https://sierraconnect.protoexpress.com/t/samtec-signal-integrity-handbook/888 "2024-01-18T07:29:38Z")
Samtec and several other thought leaders in this ecosystem know that SI 101 questions stumble many engineers and make highs-speed digital design. Samtec’s SI Handbook demystifies basic SI priciples that many learn about… --- ## [Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications](https://sierraconnect.protoexpress.com/t/bogatin-s-practical-guide-to-transmission-line-design-and-characterization-for-signal-integrity-applications/486)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 22\ **Last updated:** [January 16, 2024, 9:39pm UTC](https://sierraconnect.protoexpress.com/t/bogatin-s-practical-guide-to-transmission-line-design-and-characterization-for-signal-integrity-applications/486 "2024-01-16T21:39:48Z")
Thanks to everyone who joined our forum and got a copy of Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications. This thread is for you to ask your questions relate… --- ## [PCB trace termination techniques to ensure signal integrity](https://sierraconnect.protoexpress.com/t/pcb-trace-termination-techniques-to-ensure-signal-integrity/701)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 10\ **Last updated:** [December 21, 2023, 3:50am UTC](https://sierraconnect.protoexpress.com/t/pcb-trace-termination-techniques-to-ensure-signal-integrity/701 "2023-12-21T03:50:48Z")
Post your question about our webinar on PCB trace termination techniques to ensure signal integrity with EMA Design Automation here. --- ## [How to Reduce Ringing in Your PCB Designs](https://sierraconnect.protoexpress.com/t/how-to-reduce-ringing-in-your-pcb-designs/517)
**Author:** [@PoulomiG](https://sierraconnect.protoexpress.com/u/PoulomiG)\ **Replies:** 4\ **Last updated:** [November 27, 2023, 11:38am UTC](https://sierraconnect.protoexpress.com/t/how-to-reduce-ringing-in-your-pcb-designs/517 "2023-11-27T11:38:02Z")
Originally published at: https://www.protoexpress.com/blog/how-to-reduce-ringing-in-pcb-designs/ PCB ringing is an unwanted oscillation of voltage or current in a circuit board. During the signal transition from low …