# High-density interconnect **URL:** https://sierraconnect.protoexpress.com/c/manufacturing/high-density-interconnect/27.md [Latest](https://sierraconnect.protoexpress.com/latest.md) · [Categories](https://sierraconnect.protoexpress.com/categories.md) · [Tags](https://sierraconnect.protoexpress.com/tags.md) --- ## [About the High-density interconnect category](https://sierraconnect.protoexpress.com/t/about-the-high-density-interconnect-category/35)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [September 5, 2023, 10:26pm UTC](https://sierraconnect.protoexpress.com/t/about-the-high-density-interconnect-category/35 "2023-09-05T22:26:46Z")
The High-Density Interconnect (HDI) category on SierraConnect focuses on the challenges and innovations associated with HDI PCB designs. Here, you can discuss advanced techniques for creating densely packed circuit board… --- ## [Microvia Aspect Ratio: The One HDI Design Mistake That Messes Up Your PCB](https://sierraconnect.protoexpress.com/t/microvia-aspect-ratio-the-one-hdi-design-mistake-that-messes-up-your-pcb/4415)
**Author:** [@milan](https://sierraconnect.protoexpress.com/u/milan)\ **Replies:** 0\ **Last updated:** [August 26, 2026, 3:19pm UTC](https://sierraconnect.protoexpress.com/t/microvia-aspect-ratio-the-one-hdi-design-mistake-that-messes-up-your-pcb/4415 "2026-08-26T15:19:19Z")
Originally published at: Microvia Aspect Ratio: HDI Design Mistake | Sierra Circuits Designing a microvia with an excessive aspect ratio is one of the typical causes of reliability issues in HDI PCBs. It can result i… --- ## [0.8mm 2+2+2 HDI2 VIP stackup](https://sierraconnect.protoexpress.com/t/0-8mm-2-2-2-hdi2-vip-stackup/4083)
**Author:** [@bwest](https://sierraconnect.protoexpress.com/u/bwest)\ **Replies:** 3\ **Last updated:** [May 28, 2026, 9:34pm UTC](https://sierraconnect.protoexpress.com/t/0-8mm-2-2-2-hdi2-vip-stackup/4083 "2026-05-28T21:34:37Z")
I’m looking to change an existing 1.6mm thick 2+2+2 HDI2 VIP stackup to a 0.8mm thick stackup, but the Sierra design tool doesn’t allow (or I can’t figure out how to tweak it) the layer thickness or via parameters even t… --- ## [How to Design an HDI PCB Stack-up](https://sierraconnect.protoexpress.com/t/how-to-design-an-hdi-pcb-stack-up/3832)
**Author:** [@Pooja\_Mitra](https://sierraconnect.protoexpress.com/u/Pooja_Mitra)\ **Replies:** 0\ **Last updated:** [January 28, 2026, 3:37pm UTC](https://sierraconnect.protoexpress.com/t/how-to-design-an-hdi-pcb-stack-up/3832 "2026-01-28T15:37:34Z")
Originally published at: https://www.protoexpress.com/blog/how-to-design-hdi-pcb-stackup/ When designing an HDI PCB stack-up, you need to choose the right build-up architecture and define a via strategy that supports… --- ## [Key Aspects of DFM for HDI PCBs](https://sierraconnect.protoexpress.com/t/key-aspects-of-dfm-for-hdi-pcbs/3559)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [September 16, 2025, 6:06am UTC](https://sierraconnect.protoexpress.com/t/key-aspects-of-dfm-for-hdi-pcbs/3559 "2025-09-16T06:06:54Z")
Originally published at: https://www.protoexpress.com/blog/key-aspects-dfm-hdi-pcbs/ Design for manufacturability (DFM) for HDI PCBs refers to designing layouts that reduce the errors associated with fabrication and … --- ## [Designing and Fabricating Ultra-HDI PCBs](https://sierraconnect.protoexpress.com/t/designing-and-fabricating-ultra-hdi-pcbs/3540)
**Author:** [@Mohamed\_Faheemuddin](https://sierraconnect.protoexpress.com/u/Mohamed_Faheemuddin)\ **Replies:** 0\ **Last updated:** [September 10, 2025, 3:51pm UTC](https://sierraconnect.protoexpress.com/t/designing-and-fabricating-ultra-hdi-pcbs/3540 "2025-09-10T15:51:40Z")
Originally published at: https://www.protoexpress.com/blog/designing-fabricating-uhdi-pcbs/ Ultra-HDI PCBs are becoming essential in high-speed applications such as AI systems, where circuit density and signal integr… --- ## [Best Stack-up selection for a High-Density Board Design](https://sierraconnect.protoexpress.com/t/best-stack-up-selection-for-a-high-density-board-design/1460)
**Author:** [@Henry](https://sierraconnect.protoexpress.com/u/Henry)\ **Replies:** 3\ **Last updated:** [May 30, 2024, 7:17pm UTC](https://sierraconnect.protoexpress.com/t/best-stack-up-selection-for-a-high-density-board-design/1460 "2024-05-30T19:17:49Z")
I’m exploring options for designing a high-density board measuring 6 x12 cm, that will incorporate an MCU, external RAM, GPS, GSM, Bluetooth, CAN, and RGB interface. I’ve been contemplating which stackup would be most su… --- ## [Top 5 HDI PCB Routing Challenges and Ways to Mitigate Them](https://sierraconnect.protoexpress.com/t/top-5-hdi-pcb-routing-challenges-and-ways-to-mitigate-them/857)
**Author:** [@Pooja\_Mitra](https://sierraconnect.protoexpress.com/u/Pooja_Mitra)\ **Replies:** 4\ **Last updated:** [January 31, 2024, 5:34am UTC](https://sierraconnect.protoexpress.com/t/top-5-hdi-pcb-routing-challenges-and-ways-to-mitigate-them/857 "2024-01-31T05:34:20Z")
Originally published at: https://www.protoexpress.com/blog/hdi-pcb-routing-challenges/ HDI designs pose complex routing challenges due to their tight spacing between components and traces. The use of DRC settings in … --- ## [HDI routing](https://sierraconnect.protoexpress.com/t/hdi-routing/856)
**Author:** [@mark](https://sierraconnect.protoexpress.com/u/mark)\ **Replies:** 1\ **Last updated:** [January 12, 2024, 11:55pm UTC](https://sierraconnect.protoexpress.com/t/hdi-routing/856 "2024-01-12T23:55:23Z")
How does the increased component density on HDI PCBs impact the routing process, especially for complex designs? --- ## [10 HDI PCB Design Tips to Maintain Signal Integrity](https://sierraconnect.protoexpress.com/t/10-hdi-pcb-design-tips-to-maintain-signal-integrity/248)
**Author:** [@Pooja\_Mitra](https://sierraconnect.protoexpress.com/u/Pooja_Mitra)\ **Replies:** 4\ **Last updated:** [December 22, 2023, 8:14pm UTC](https://sierraconnect.protoexpress.com/t/10-hdi-pcb-design-tips-to-maintain-signal-integrity/248 "2023-12-22T20:14:03Z")
Originally published at: https://www.protoexpress.com/blog/hdi-pcb-design-tips-for-signal-integrity/ When it comes to designing HDI PCBs, a plethora of challenges await, including complex routing requirements, issues… --- ## [How to Design Reliable Microvias in Your PCBs](https://sierraconnect.protoexpress.com/t/how-to-design-reliable-microvias-in-your-pcbs/509)
**Author:** [@Mohamed\_Faheemuddin](https://sierraconnect.protoexpress.com/u/Mohamed_Faheemuddin)\ **Replies:** 4\ **Last updated:** [November 21, 2023, 6:11am UTC](https://sierraconnect.protoexpress.com/t/how-to-design-reliable-microvias-in-your-pcbs/509 "2023-11-21T06:11:51Z")
Originally published at: https://www.protoexpress.com/blog/how-to-design-reliable-microvias-in-your-pcbs/ Microvia failure occurs due to the thermal stresses that arise during the PCB assembly process. These stresses… --- ## [TIP: Choosing materials for HDI boards](https://sierraconnect.protoexpress.com/t/tip-choosing-materials-for-hdi-boards/264)
**Author:** [@atar.mittal](https://sierraconnect.protoexpress.com/u/atar.mittal)\ **Replies:** 0\ **Last updated:** [October 24, 2023, 12:25am UTC](https://sierraconnect.protoexpress.com/t/tip-choosing-materials-for-hdi-boards/264 "2023-10-24T00:25:25Z")
The success of high-density designs heavily relies on the careful selection of appropriate HDI PCB materials that can considerably impact signal integrity, thermal management, and the overall performance of your design. … --- ## [Challenges with HDI routing](https://sierraconnect.protoexpress.com/t/challenges-with-hdi-routing/139)
**Author:** [@lucy.sierracircuits](https://sierraconnect.protoexpress.com/u/lucy.sierracircuits)\ **Replies:** 0\ **Last updated:** [September 26, 2023, 5:02pm UTC](https://sierraconnect.protoexpress.com/t/challenges-with-hdi-routing/139 "2023-09-26T17:02:04Z")
What are your biggest challenges when routing HDI boards?